76964e3140
As detailed on D22726, much of the shift combining code assume constant values will fit into a uint64_t value and calls ConstantSDNode::getZExtValue where it probably shouldn't (leading to asserts). Using APInt directly avoids this problem but we encounter other assertions if we attempt to compare/operate on 2 APInt of different bitwidths. This patch adds a helper function to ensure that 2 APInt values are zero extended as required so that they can be safely used together. I've only added an initial example use for this to the '(SHIFT (SHIFT x, c1), c2) --> (SHIFT x, (ADD c1, c2))' combines. Further cases can easily be added as required. Differential Revision: https://reviews.llvm.org/D23007 llvm-svn: 278141
119 lines
2.9 KiB
LLVM
119 lines
2.9 KiB
LLVM
; RUN: llc < %s -march=x86
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; RUN: llc < %s -march=x86-64
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;
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; Scalars
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;
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define void @test_lshr_i128(i128 %x, i128 %a, i128* nocapture %r) nounwind {
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entry:
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%0 = lshr i128 %x, %a
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store i128 %0, i128* %r, align 16
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ret void
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}
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define void @test_ashr_i128(i128 %x, i128 %a, i128* nocapture %r) nounwind {
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entry:
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%0 = ashr i128 %x, %a
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store i128 %0, i128* %r, align 16
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ret void
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}
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define void @test_shl_i128(i128 %x, i128 %a, i128* nocapture %r) nounwind {
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entry:
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%0 = shl i128 %x, %a
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store i128 %0, i128* %r, align 16
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ret void
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}
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define void @test_lshr_i128_outofrange(i128 %x, i128* nocapture %r) nounwind {
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entry:
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%0 = lshr i128 %x, -1
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store i128 %0, i128* %r, align 16
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ret void
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}
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define void @test_ashr_i128_outofrange(i128 %x, i128* nocapture %r) nounwind {
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entry:
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%0 = ashr i128 %x, -1
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store i128 %0, i128* %r, align 16
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ret void
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}
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define void @test_shl_i128_outofrange(i128 %x, i128* nocapture %r) nounwind {
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entry:
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%0 = shl i128 %x, -1
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store i128 %0, i128* %r, align 16
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ret void
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}
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;
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; Vectors
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;
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define void @test_lshr_v2i128(<2 x i128> %x, <2 x i128> %a, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = lshr <2 x i128> %x, %a
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store <2 x i128> %0, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_ashr_v2i128(<2 x i128> %x, <2 x i128> %a, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = ashr <2 x i128> %x, %a
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store <2 x i128> %0, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_shl_v2i128(<2 x i128> %x, <2 x i128> %a, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = shl <2 x i128> %x, %a
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store <2 x i128> %0, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_lshr_v2i128_outofrange(<2 x i128> %x, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = lshr <2 x i128> %x, <i128 -1, i128 -1>
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store <2 x i128> %0, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_ashr_v2i128_outofrange(<2 x i128> %x, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = ashr <2 x i128> %x, <i128 -1, i128 -1>
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store <2 x i128> %0, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_shl_v2i128_outofrange(<2 x i128> %x, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = shl <2 x i128> %x, <i128 -1, i128 -1>
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store <2 x i128> %0, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_lshr_v2i128_outofrange_sum(<2 x i128> %x, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = lshr <2 x i128> %x, <i128 -1, i128 -1>
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%1 = lshr <2 x i128> %0, <i128 1, i128 1>
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store <2 x i128> %1, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_ashr_v2i128_outofrange_sum(<2 x i128> %x, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = ashr <2 x i128> %x, <i128 -1, i128 -1>
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%1 = ashr <2 x i128> %0, <i128 1, i128 1>
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store <2 x i128> %1, <2 x i128>* %r, align 16
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ret void
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}
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define void @test_shl_v2i128_outofrange_sum(<2 x i128> %x, <2 x i128>* nocapture %r) nounwind {
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entry:
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%0 = shl <2 x i128> %x, <i128 -1, i128 -1>
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%1 = shl <2 x i128> %0, <i128 1, i128 1>
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store <2 x i128> %1, <2 x i128>* %r, align 16
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ret void
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}
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