5f30897b7b
This patch updates MemorySSA's use-optimizing walker to be more accurate and, in some cases, faster. Essentially, this changed our core walking algorithm from a cache-as-you-go DFS to an iteratively expanded DFS, with all of the caching happening at the end. Said expansion happens when we hit a Phi, P; we'll try to do the smallest amount of work possible to see if optimizing above that Phi is legal in the first place. If so, we'll expand the search to see if we can optimize to the next phi, etc. An iteratively expanded DFS lets us potentially quit earlier (because we don't assume that we can optimize above all phis) than our old walker. Additionally, because we don't cache as we go, we can now optimize above loops. As an added bonus, this patch adds a ton of verification (if EXPENSIVE_CHECKS are enabled), so finding bugs is easier. Differential Revision: https://reviews.llvm.org/D21777 llvm-svn: 275940
124 lines
4.7 KiB
LLVM
124 lines
4.7 KiB
LLVM
; RUN: opt -basicaa -print-memoryssa -verify-memoryssa -analyze < %s 2>&1 | FileCheck %s
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; RUN: opt -aa-pipeline=basic-aa -passes='print<memoryssa>,verify<memoryssa>' -disable-output < %s 2>&1 | FileCheck %s
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%struct.hoge = type { i32, %struct.widget }
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%struct.widget = type { i64 }
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define hidden void @quux(%struct.hoge *%f) align 2 {
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%tmp = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1, i32 0
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%tmp24 = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1
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%tmp25 = bitcast %struct.widget* %tmp24 to i64**
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br label %bb26
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bb26: ; preds = %bb77, %0
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; CHECK: 3 = MemoryPhi({%0,liveOnEntry},{bb77,2})
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; CHECK-NEXT: br i1 undef, label %bb68, label %bb77
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br i1 undef, label %bb68, label %bb77
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bb68: ; preds = %bb26
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; CHECK: MemoryUse(liveOnEntry)
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; CHECK-NEXT: %tmp69 = load i64, i64* null, align 8
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%tmp69 = load i64, i64* null, align 8
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; CHECK: 1 = MemoryDef(3)
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; CHECK-NEXT: store i64 %tmp69, i64* %tmp, align 8
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store i64 %tmp69, i64* %tmp, align 8
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br label %bb77
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bb77: ; preds = %bb68, %bb26
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; CHECK: 2 = MemoryPhi({bb26,3},{bb68,1})
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; CHECK: MemoryUse(2)
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; CHECK-NEXT: %tmp78 = load i64*, i64** %tmp25, align 8
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%tmp78 = load i64*, i64** %tmp25, align 8
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%tmp79 = getelementptr inbounds i64, i64* %tmp78, i64 undef
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br label %bb26
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}
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; CHECK-LABEL: define void @quux_skip
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define void @quux_skip(%struct.hoge* noalias %f, i64* noalias %g) align 2 {
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%tmp = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1, i32 0
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%tmp24 = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1
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%tmp25 = bitcast %struct.widget* %tmp24 to i64**
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br label %bb26
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bb26: ; preds = %bb77, %0
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; CHECK: 3 = MemoryPhi({%0,liveOnEntry},{bb77,2})
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; CHECK-NEXT: br i1 undef, label %bb68, label %bb77
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br i1 undef, label %bb68, label %bb77
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bb68: ; preds = %bb26
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; CHECK: MemoryUse(3)
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; CHECK-NEXT: %tmp69 = load i64, i64* %g, align 8
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%tmp69 = load i64, i64* %g, align 8
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; CHECK: 1 = MemoryDef(3)
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; CHECK-NEXT: store i64 %tmp69, i64* %g, align 8
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store i64 %tmp69, i64* %g, align 8
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br label %bb77
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bb77: ; preds = %bb68, %bb26
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; CHECK: 2 = MemoryPhi({bb26,3},{bb68,1})
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; CHECK: MemoryUse(liveOnEntry)
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; CHECK-NEXT: %tmp78 = load i64*, i64** %tmp25, align 8
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%tmp78 = load i64*, i64** %tmp25, align 8
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br label %bb26
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}
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; CHECK-LABEL: define void @quux_dominated
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define void @quux_dominated(%struct.hoge* noalias %f, i64* noalias %g) align 2 {
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%tmp = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1, i32 0
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%tmp24 = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1
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%tmp25 = bitcast %struct.widget* %tmp24 to i64**
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br label %bb26
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bb26: ; preds = %bb77, %0
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; CHECK: 4 = MemoryPhi({%0,liveOnEntry},{bb77,2})
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; CHECK: MemoryUse(4)
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; CHECK-NEXT: load i64*, i64** %tmp25, align 8
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load i64*, i64** %tmp25, align 8
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br i1 undef, label %bb68, label %bb77
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bb68: ; preds = %bb26
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; CHECK: MemoryUse(4)
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; CHECK-NEXT: %tmp69 = load i64, i64* %g, align 8
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%tmp69 = load i64, i64* %g, align 8
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; CHECK: 1 = MemoryDef(4)
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; CHECK-NEXT: store i64 %tmp69, i64* %g, align 8
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store i64 %tmp69, i64* %g, align 8
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br label %bb77
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bb77: ; preds = %bb68, %bb26
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; CHECK: 3 = MemoryPhi({bb26,4},{bb68,1})
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; CHECK: 2 = MemoryDef(3)
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; CHECK-NEXT: store i64* null, i64** %tmp25, align 8
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store i64* null, i64** %tmp25, align 8
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br label %bb26
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}
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; CHECK-LABEL: define void @quux_nodominate
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define void @quux_nodominate(%struct.hoge* noalias %f, i64* noalias %g) align 2 {
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%tmp = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1, i32 0
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%tmp24 = getelementptr inbounds %struct.hoge, %struct.hoge* %f, i64 0, i32 1
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%tmp25 = bitcast %struct.widget* %tmp24 to i64**
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br label %bb26
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bb26: ; preds = %bb77, %0
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; CHECK: 3 = MemoryPhi({%0,liveOnEntry},{bb77,2})
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; CHECK: MemoryUse(liveOnEntry)
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; CHECK-NEXT: load i64*, i64** %tmp25, align 8
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load i64*, i64** %tmp25, align 8
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br i1 undef, label %bb68, label %bb77
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bb68: ; preds = %bb26
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; CHECK: MemoryUse(3)
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; CHECK-NEXT: %tmp69 = load i64, i64* %g, align 8
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%tmp69 = load i64, i64* %g, align 8
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; CHECK: 1 = MemoryDef(3)
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; CHECK-NEXT: store i64 %tmp69, i64* %g, align 8
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store i64 %tmp69, i64* %g, align 8
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br label %bb77
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bb77: ; preds = %bb68, %bb26
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; CHECK: 2 = MemoryPhi({bb26,3},{bb68,1})
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; CHECK-NEXT: br label %bb26
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br label %bb26
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}
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