a699ccbf0c
Redefines the amd_kernel_code_t struct with MCExprs for members that would be derived from SIProgramInfo MCExpr members.
91 lines
3.2 KiB
C++
91 lines
3.2 KiB
C++
//===- AMDGPUKernelCodeTUtils.h - helpers for amd_kernel_code_t -*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file AMDKernelCodeTUtils.h
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/// MC layer struct for AMDGPUMCKernelCodeT, provides MCExpr functionality where
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/// required.
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///
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCKERNELCODET_H
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#define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCKERNELCODET_H
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#include "AMDKernelCodeT.h"
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/StringRef.h"
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namespace llvm {
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class MCAsmParser;
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class MCContext;
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class MCExpr;
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class MCStreamer;
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class MCSubtargetInfo;
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class raw_ostream;
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namespace AMDGPU {
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struct AMDGPUMCKernelCodeT {
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AMDGPUMCKernelCodeT() = default;
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// Names of most (if not all) members should match the ones used for table
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// driven (array) generation in AMDKernelCodeTInfo.h.
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uint32_t amd_kernel_code_version_major = 0;
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uint32_t amd_kernel_code_version_minor = 0;
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uint16_t amd_machine_kind = 0;
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uint16_t amd_machine_version_major = 0;
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uint16_t amd_machine_version_minor = 0;
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uint16_t amd_machine_version_stepping = 0;
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int64_t kernel_code_entry_byte_offset = 0;
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int64_t kernel_code_prefetch_byte_offset = 0;
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uint64_t kernel_code_prefetch_byte_size = 0;
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uint64_t reserved0 = 0;
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uint64_t compute_pgm_resource_registers = 0;
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uint32_t code_properties = 0;
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uint32_t workgroup_group_segment_byte_size = 0;
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uint32_t gds_segment_byte_size = 0;
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uint64_t kernarg_segment_byte_size = 0;
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uint32_t workgroup_fbarrier_count = 0;
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uint16_t reserved_vgpr_first = 0;
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uint16_t reserved_vgpr_count = 0;
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uint16_t reserved_sgpr_first = 0;
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uint16_t reserved_sgpr_count = 0;
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uint16_t debug_wavefront_private_segment_offset_sgpr = 0;
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uint16_t debug_private_segment_buffer_sgpr = 0;
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uint8_t kernarg_segment_alignment = 0;
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uint8_t group_segment_alignment = 0;
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uint8_t private_segment_alignment = 0;
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uint8_t wavefront_size = 0;
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int32_t call_convention = 0;
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uint8_t reserved3[12] = {0};
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uint64_t runtime_loader_kernel_symbol = 0;
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uint64_t control_directives[16] = {0};
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const MCExpr *compute_pgm_resource1_registers = nullptr;
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const MCExpr *compute_pgm_resource2_registers = nullptr;
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const MCExpr *is_dynamic_callstack = nullptr;
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const MCExpr *wavefront_sgpr_count = nullptr;
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const MCExpr *workitem_vgpr_count = nullptr;
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const MCExpr *workitem_private_segment_byte_size = nullptr;
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void initDefault(const MCSubtargetInfo *STI, MCContext &Ctx,
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bool InitMCExpr = true);
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void validate(const MCSubtargetInfo *STI, MCContext &Ctx);
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const MCExpr *&getMCExprForIndex(int Index);
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bool ParseKernelCodeT(StringRef ID, MCAsmParser &MCParser, raw_ostream &Err);
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void EmitKernelCodeT(raw_ostream &OS, MCContext &Ctx);
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void EmitKernelCodeT(MCStreamer &OS, MCContext &Ctx);
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};
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} // end namespace AMDGPU
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCKERNELCODET_H
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