99d6c6d936
This patch moves branch condition creation to enter the scalar epilogue loop to VPlan. Modeling the branch in the middle block also requires modeling the successor blocks. This is done using the recently introduced VPIRBasicBlock. Note that the middle.block is still created as part of the skeleton and then patched in during VPlan execution. Unfortunately the skeleton needs to create the middle.block early on, as it is also used for induction resume value creation and is also needed to properly update the dominator tree during skeleton creation. After this patch lands, I plan to move induction resume value and phi node creation in the scalar preheader to VPlan. Once that is done, we should be able to create the middle.block in VPlan directly. This is a re-worked version based on the earlier https://reviews.llvm.org/D150398 and the main change is the use of VPIRBasicBlock. Depends on https://github.com/llvm/llvm-project/pull/92525 PR: https://github.com/llvm/llvm-project/pull/92651
173 lines
7.3 KiB
LLVM
173 lines
7.3 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -debug-only=loop-vectorize -disable-output -S %s 2>&1 | FileCheck %s
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define void @test_chained_first_order_recurrences_1(ptr %ptr) {
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; CHECK-LABEL: 'test_chained_first_order_recurrences_1'
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; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
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; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF
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; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
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; CHECK-NEXT: Live-in ir<1000> = original trip-count
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; CHECK-EMPTY:
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; CHECK-NEXT: vector.ph:
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; CHECK-NEXT: Successor(s): vector loop
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; CHECK-EMPTY:
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; CHECK-NEXT: <x1> vector loop: {
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; CHECK-NEXT: vector.body:
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; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
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; CHECK-NEXT: FIRST-ORDER-RECURRENCE-PHI ir<%for.1> = phi ir<22>, ir<%for.1.next>
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; CHECK-NEXT: FIRST-ORDER-RECURRENCE-PHI ir<%for.2> = phi ir<33>, vp<[[FOR1_SPLICE:%.+]]>
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; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
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; CHECK-NEXT: CLONE ir<%gep.ptr> = getelementptr inbounds ir<%ptr>, vp<[[STEPS]]>
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; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%gep.ptr>
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; CHECK-NEXT: WIDEN ir<%for.1.next> = load vp<[[VEC_PTR]]>
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; CHECK-NEXT: EMIT vp<[[FOR1_SPLICE]]> = first-order splice ir<%for.1>, ir<%for.1.next>
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; CHECK-NEXT: EMIT vp<[[FOR2_SPLICE:%.+]]> = first-order splice ir<%for.2>, vp<[[FOR1_SPLICE]]>
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; CHECK-NEXT: WIDEN ir<%add> = add vp<[[FOR1_SPLICE]]>, vp<[[FOR2_SPLICE]]>
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; CHECK-NEXT: vp<[[VEC_PTR2:%.+]]> = vector-pointer ir<%gep.ptr>
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; CHECK-NEXT: WIDEN store vp<[[VEC_PTR2]]>, ir<%add>
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; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
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; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
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; CHECK-NEXT: No successors
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; CHECK-NEXT: }
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; CHECK-NEXT: Successor(s): middle.block
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; CHECK-EMPTY:
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; CHECK-NEXT: middle.block:
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; CHECK-NEXT: EMIT vp<[[RESUME_1:%.+]]> = extract-from-end ir<%for.1.next>, ir<1>
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; CHECK-NEXT: EMIT vp<[[RESUME_2:%.+]]> = extract-from-end vp<[[FOR1_SPLICE]]>, ir<1>
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; CHECK-NEXT: EMIT vp<[[CMP:%.+]]> = icmp eq ir<1000>, vp<[[VTC]]>
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; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
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; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph
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; CHECK-EMPTY:
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; CHECK-NEXT: ir-bb<exit>
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; CHECK-NEXT: No successors
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; CHECK-EMPTY:
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; CHECK-NEXT: scalar.ph
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; CHECK-NEXT: No successors
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; CHECK-EMPTY:
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; CHECK-NEXT: Live-out i16 %for.1 = vp<[[RESUME_1]]>
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; CHECK-NEXT: Live-out i16 %for.2 = vp<[[RESUME_2]]>
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; CHECK-NEXT: }
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;
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entry:
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br label %loop
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loop:
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%for.1 = phi i16 [ 22, %entry ], [ %for.1.next, %loop ]
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%for.2 = phi i16 [ 33, %entry ], [ %for.1, %loop ]
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%iv.next = add nuw nsw i64 %iv, 1
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%gep.ptr = getelementptr inbounds i16, ptr %ptr, i64 %iv
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%for.1.next = load i16, ptr %gep.ptr, align 2
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%add = add i16 %for.1, %for.2
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store i16 %add, ptr %gep.ptr
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%exitcond.not = icmp eq i64 %iv.next, 1000
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br i1 %exitcond.not, label %exit, label %loop
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exit:
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ret void
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}
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define void @test_chained_first_order_recurrences_3(ptr %ptr) {
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; CHECK-LABEL: 'test_chained_first_order_recurrences_3'
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; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
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; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF
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; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
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; CHECK-NEXT: Live-in ir<1000> = original trip-count
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; CHECK-EMPTY:
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; CHECK-NEXT: vector.ph:
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; CHECK-NEXT: Successor(s): vector loop
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; CHECK-EMPTY:
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; CHECK-NEXT: <x1> vector loop: {
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; CHECK-NEXT: vector.body:
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; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
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; CHECK-NEXT: FIRST-ORDER-RECURRENCE-PHI ir<%for.1> = phi ir<22>, ir<%for.1.next>
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; CHECK-NEXT: FIRST-ORDER-RECURRENCE-PHI ir<%for.2> = phi ir<33>, vp<[[FOR1_SPLICE:%.+]]>
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; CHECK-NEXT: FIRST-ORDER-RECURRENCE-PHI ir<%for.3> = phi ir<33>, vp<[[FOR2_SPLICE:%.+]]>
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; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
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; CHECK-NEXT: CLONE ir<%gep.ptr> = getelementptr inbounds ir<%ptr>, vp<[[STEPS]]>
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; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%gep.ptr>
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; CHECK-NEXT: WIDEN ir<%for.1.next> = load vp<[[VEC_PTR]]>
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; CHECK-NEXT: EMIT vp<[[FOR1_SPLICE]]> = first-order splice ir<%for.1>, ir<%for.1.next>
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; CHECK-NEXT: EMIT vp<[[FOR2_SPLICE]]> = first-order splice ir<%for.2>, vp<[[FOR1_SPLICE]]>
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; CHECK-NEXT: EMIT vp<[[FOR3_SPLICE:%.+]]> = first-order splice ir<%for.3>, vp<[[FOR2_SPLICE]]>
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; CHECK-NEXT: WIDEN ir<%add.1> = add vp<[[FOR1_SPLICE]]>, vp<[[FOR2_SPLICE]]>
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; CHECK-NEXT: WIDEN ir<%add.2> = add ir<%add.1>, vp<[[FOR3_SPLICE]]>
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; CHECK-NEXT: vp<[[VEC_PTR2:%.+]]> = vector-pointer ir<%gep.ptr>
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; CHECK-NEXT: WIDEN store vp<[[VEC_PTR2]]>, ir<%add.2>
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; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
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; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
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; CHECK-NEXT: No successors
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; CHECK-NEXT: }
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; CHECK-NEXT: Successor(s): middle.block
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; CHECK-EMPTY:
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; CHECK-NEXT: middle.block:
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; CHECK-NEXT: EMIT vp<[[RESUME_1:%.+]]> = extract-from-end ir<%for.1.next>, ir<1>
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; CHECK-NEXT: EMIT vp<[[RESUME_2:%.+]]> = extract-from-end vp<[[FOR1_SPLICE]]>, ir<1>
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; CHECK-NEXT: EMIT vp<[[RESUME_3:%.+]]> = extract-from-end vp<[[FOR2_SPLICE]]>, ir<1>
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; CHECK-NEXT: EMIT vp<[[CMP:%.+]]> = icmp eq ir<1000>, vp<[[VTC]]>
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; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
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; CHECK-NEXT: Successor(s): ir-bb<exit>, scalar.ph
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; CHECK-EMPTY:
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; CHECK-NEXT: ir-bb<exit>
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; CHECK-NEXT: No successors
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; CHECK-EMPTY:
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; CHECK-NEXT: scalar.ph
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; CHECK-NEXT: No successors
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; CHECK-EMPTY:
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; CHECK-NEXT: Live-out i16 %for.1 = vp<[[RESUME_1]]>
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; CHECK-NEXT: Live-out i16 %for.2 = vp<[[RESUME_2]]>
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; CHECK-NEXT: Live-out i16 %for.3 = vp<[[RESUME_3]]>
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; CHECK-NEXT: }
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;
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entry:
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br label %loop
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loop:
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%for.1 = phi i16 [ 22, %entry ], [ %for.1.next, %loop ]
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%for.2 = phi i16 [ 33, %entry ], [ %for.1, %loop ]
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%for.3 = phi i16 [ 33, %entry ], [ %for.2, %loop ]
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%iv.next = add nuw nsw i64 %iv, 1
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%gep.ptr = getelementptr inbounds i16, ptr %ptr, i64 %iv
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%for.1.next = load i16, ptr %gep.ptr, align 2
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%add.1 = add i16 %for.1, %for.2
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%add.2 = add i16 %add.1, %for.3
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store i16 %add.2, ptr %gep.ptr
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%exitcond.not = icmp eq i64 %iv.next, 1000
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br i1 %exitcond.not, label %exit, label %loop
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exit:
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ret void
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}
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; This test has two FORs (for.x and for.y) where incoming value from the previous
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; iteration (for.x.prev) of one FOR (for.y) depends on another FOR (for.x). Due to
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; this dependency all uses of the former FOR (for.y) should be sunk after
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; incoming value from the previous iteration (for.x.prev) of te latter FOR (for.y).
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; That means side-effecting user (store i64 %for.y.i64, ptr %gep) of the latter
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; FOR (for.y) should be moved which is not currently supported.
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define i32 @test_chained_first_order_recurrences_4(ptr %base) {
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; CHECK-LABEL: 'test_chained_first_order_recurrences_4'
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; CHECK: No VPlan could be built for
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entry:
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br label %loop
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ret:
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ret i32 0
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loop:
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%iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
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%for.x = phi i64 [ %for.x.next, %loop ], [ 0, %entry ]
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%for.y = phi i32 [ %for.x.prev, %loop ], [ 0, %entry ]
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%iv.next = add i64 %iv, 1
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%gep = getelementptr i64, ptr %base, i64 %iv
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%for.x.prev = trunc i64 %for.x to i32
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%for.y.i64 = sext i32 %for.y to i64
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store i64 %for.y.i64, ptr %gep
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%for.x.next = mul i64 0, 0
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%icmp = icmp ugt i64 %iv, 4096
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br i1 %icmp, label %ret, label %loop
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}
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