Simon Moll 7a86645611 [VE] VP intrinsics are legal

2021-04-30 15:47:55 +02:00

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AsmParser

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Disassembler

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MCTargetDesc

[VE] Add include for formatted_raw_ostream after 046cfb8565

2021-01-29 11:18:30 -08:00

TargetInfo

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CMakeLists.txt

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LVLGen.cpp

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VE.h

[VE] Change inetger constants 32-bit friendly

2021-02-01 19:00:47 +09:00

VE.td

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VEAsmPrinter.cpp

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VECallingConv.td

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VEFrameLowering.cpp

[NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions

2021-03-30 17:31:39 +01:00

VEFrameLowering.h

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VEInstrBuilder.h

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VEInstrFormats.td

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VEInstrInfo.cpp

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VEInstrInfo.h

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VEInstrInfo.td

[VE] Fix types of multiclass template arguments in TableGen files

2021-03-20 10:36:51 -07:00

VEInstrIntrinsicVL.gen.td

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VEInstrIntrinsicVL.td

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VEInstrPatternsVec.td

[VE] Fix types of multiclass template arguments in TableGen files

2021-03-20 10:36:51 -07:00

VEInstrVec.td

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VEISelDAGToDAG.cpp

[llvm] Use isa instead of dyn_cast (NFC)

2021-01-29 23:23:37 -08:00

VEISelLowering.cpp

[VE] Fix allowsMisalignedMemoryAccesses after D96097

2021-02-04 20:46:18 -08:00

VEISelLowering.h

[VE] Fix allowsMisalignedMemoryAccesses after D96097

2021-02-04 20:46:18 -08:00

VEMachineFunctionInfo.cpp

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VEMachineFunctionInfo.h

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VEMCInstLower.cpp

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VERegisterInfo.cpp

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VERegisterInfo.h

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VERegisterInfo.td

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VESubtarget.cpp

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VESubtarget.h

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VETargetMachine.cpp

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VETargetMachine.h

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VETargetTransformInfo.h

[VE] VP intrinsics are legal

2021-04-30 15:47:55 +02:00

VVPInstrInfo.td

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VVPInstrPatternsVec.td

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VVPNodes.def

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