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clang-p2996/llvm/test/CodeGen
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Stanislav Mekhanoshin cf6565f6d0 [AMDGPU] Enable multi-dword flat scratch load/stores 
Differential Revision: https://reviews.llvm.org/D91384
2020-11-12 13:38:56 -08:00
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AArch64
[SVE] Deal with SVE tuple call arguments correctly when running out of registers
2020-11-12 08:41:50 +00:00
AMDGPU
[AMDGPU] Enable multi-dword flat scratch load/stores
2020-11-12 13:38:56 -08:00
ARC
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ARM
[ARM] Fix PR 47980: Use constrainRegClass during foldImmediate opt.
2020-11-10 13:38:11 -08:00
AVR
[AVR] Improve inline rotate/shift expansions
2020-10-31 23:15:49 +01:00
BPF
[NewPM] Provide method to run all pipeline callbacks, used for -O0
2020-11-11 15:10:27 -08:00
Generic
[Annotation] Allows annotation to carry some additional constant arguments.
2020-10-26 10:50:05 +01:00
Hexagon
[Hexagon] Handle additional shuffles that can be made perfect
2020-10-29 19:09:00 -05:00
Inputs
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Lanai
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Mips
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MIR
Revert "Revert "[AMDGPU] Reorganize GCN subtarget features for unaligned access""
2020-11-11 14:40:14 +00:00
MSP430
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NVPTX
[TargetLowering] Add i1 condition for bit comparison fold
2020-10-27 12:22:20 +00:00
PowerPC
[PowerPC] Accumulator/Unprimed Accumulator register copy, spill and restore
2020-11-11 16:23:45 -06:00
RISCV
[RISCV] Add an ANDI to shift amount of FSL/FSR instructions
2020-11-12 07:33:40 -08:00
SPARC
[Sparc] fp16-promote.ll - Refactor check prefixes + remove unused ones
2020-11-11 18:38:22 +00:00
SystemZ
[SystemZ] Regenerate some fp tests + remove unused check prefixes
2020-11-11 18:38:22 +00:00
Thumb
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Thumb2
[ARM] Ensure CountReg definition dominates InsertPt when creating t2DoLoopStartTP
2020-11-12 13:47:46 +00:00
VE
[VE] Change the default type of v64 register class
2020-11-12 19:07:07 +09:00
WebAssembly
[WebAssembly] Don't fold frame offset for global addresses
2020-11-03 14:56:25 -08:00
WinCFGuard
Revert "Reland [CFGuard] Add address-taken IAT tables and delay-load support"
2020-11-11 16:03:33 +01:00
WinEH
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X86
[CodeGen][X86] Remove unused check-prefixes from vec tests. NFCI.
2020-11-11 15:32:42 +08:00
XCore
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