Files
clang-p2996/llvm/test/CodeGen/AMDGPU/iglp.opt.reentry.ll
Jeffrey Byrnes 6e7fe85247 [AMDGPU] Teach iterative schedulers about IGLP (#134953)
This adds IGLP mutation to the iterative schedulers
(`gcn-iterative-max-occupancy-experimental`, `gcn-iterative-minreg`, and
`gcn-iterative-ilp`).

The `gcn-iterative-minreg` and `gcn-iterative-ilp` schedulers never
actually applied the mutations added, so this also has the effect of
teaching them about mutations in general. The
`gcn-iterative-max-occupancy-experimental` scheduler has calls to
`ScheduleDAGMILive::schedule()`, so, before this, mutations were applied
at this point. Now this is done during calls to `BuildDAG`, with IGLP
superseding other mutations (similar to the other schedulers). We may
end up scheduling regions multiple times, with mutations being applied
each time, so we need to track for
`AMDGPU::SchedulingPhase::PreRAReentry`
2025-04-11 15:34:49 -07:00

18 lines
787 B
LLVM

; RUN: llc -mtriple=amdgcn -mcpu=gfx908 -O3 < %s | FileCheck %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx908 -O3 -misched=gcn-iterative-max-occupancy-experimental < %s | FileCheck %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx908 -O3 -misched=gcn-iterative-ilp < %s | FileCheck %s
; Test should not result in build failure
; CHECK-LABEL: shouldNotReApply
define amdgpu_kernel void @shouldNotReApply() {
entry:
tail call void @llvm.amdgcn.sched.barrier(i32 0)
store <4 x i32> zeroinitializer, ptr addrspace(3) null, align 2147483648
tail call void @llvm.amdgcn.sched.group.barrier(i32 0, i32 0, i32 0)
tail call void @llvm.amdgcn.sched.barrier(i32 0)
store i32 0, ptr addrspace(5) null, align 2147483648
tail call void @llvm.amdgcn.sched.group.barrier(i32 0, i32 0, i32 0)
ret void
}