80267f8148
The recently announced IBM z17 processor implements the architecture already supported as "arch15" in LLVM. This patch adds support for "z17" as an alternate architecture name for arch15. This patch also add the scheduler description for the z17 processor, provided by Jonas Paulsson.
102 lines
3.0 KiB
LLVM
102 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; Test use of LOAD LOGICAL INDEXED ADDRESS doubleword instructions.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z17 | FileCheck %s
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; LLXAG with base and index.
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define dso_local ptr @f0(ptr %ptr, i32 %idx) {
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; CHECK-LABEL: f0:
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; CHECK: # %bb.0:
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; CHECK-NEXT: llxag %r2, 0(%r3,%r2)
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; CHECK-NEXT: br %r14
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%idxprom = zext i32 %idx to i64
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%arrayidx = getelementptr inbounds i64, ptr %ptr, i64 %idxprom
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ret ptr %arrayidx
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}
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; LLXAG with base and index (implied extension).
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define dso_local ptr @f1(ptr %ptr, i32 zeroext %idx) {
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; CHECK-LABEL: f1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: llxag %r2, 0(%r3,%r2)
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; CHECK-NEXT: br %r14
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%idxprom = zext i32 %idx to i64
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%arrayidx = getelementptr inbounds i64, ptr %ptr, i64 %idxprom
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ret ptr %arrayidx
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}
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; LLXAG with base and index and max displacement.
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define dso_local ptr @f2(ptr %ptr, i32 %idx) {
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; CHECK-LABEL: f2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: llxag %r2, 524287(%r3,%r2)
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; CHECK-NEXT: br %r14
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%idxoff = add i32 %idx, 524287
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%idxprom = zext i32 %idxoff to i64
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%arrayidx = getelementptr inbounds i64, ptr %ptr, i64 %idxprom
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ret ptr %arrayidx
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}
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; LLXAG with base and index and min displacement.
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define dso_local ptr @f3(ptr %ptr, i32 %idx) {
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; CHECK-LABEL: f3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: llxag %r2, -524288(%r3,%r2)
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; CHECK-NEXT: br %r14
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%idxoff = add i32 %idx, -524288
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%idxprom = zext i32 %idxoff to i64
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%arrayidx = getelementptr inbounds i64, ptr %ptr, i64 %idxprom
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ret ptr %arrayidx
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}
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; LLXAG with base and index and max displacement overflow.
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define dso_local ptr @f4(ptr %ptr, i32 %idx) {
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; CHECK-LABEL: f4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: afi %r3, 524288
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; CHECK-NEXT: llxag %r2, 0(%r3,%r2)
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; CHECK-NEXT: br %r14
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%idxoff = add i32 %idx, 524288
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%idxprom = zext i32 %idxoff to i64
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%arrayidx = getelementptr inbounds i64, ptr %ptr, i64 %idxprom
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ret ptr %arrayidx
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}
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; LLXAG with base and index and min displacement overflow.
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define dso_local ptr @f5(ptr %ptr, i32 %idx) {
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; CHECK-LABEL: f5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: afi %r3, -524289
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; CHECK-NEXT: llxag %r2, 0(%r3,%r2)
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; CHECK-NEXT: br %r14
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%idxoff = add i32 %idx, -524289
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%idxprom = zext i32 %idxoff to i64
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%arrayidx = getelementptr inbounds i64, ptr %ptr, i64 %idxprom
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ret ptr %arrayidx
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}
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; DO NOT USE: LLXAG with index.
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define dso_local i64 @f6(i32 %idx) {
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; CHECK-LABEL: f6:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $r2l killed $r2l def $r2d
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; CHECK-NEXT: risbgn %r2, %r2, 29, 188, 3
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; CHECK-NEXT: br %r14
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%idxprom = zext i32 %idx to i64
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%idxshift = shl i64 %idxprom, 3
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ret i64 %idxshift
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}
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; LLXAG with index and displacement.
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define dso_local i64 @f7(i32 %idx) {
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; CHECK-LABEL: f7:
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; CHECK: # %bb.0:
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; CHECK-NEXT: llxag %r2, 1(%r2,0)
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; CHECK-NEXT: br %r14
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%idxoff = add i32 %idx, 1
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%idxprom = zext i32 %idxoff to i64
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%idxshift = shl i64 %idxprom, 3
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ret i64 %idxshift
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}
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