be7ef6c52b
EH landing pad entry implicitly clobbers target-specific exception pointer and exception selector registers. The post-RA MachineLICM pass needs to take these into account when deciding whether to hoist an instruction out of the loop that initializes one of these registers. Fixes: https://github.com/llvm/llvm-project/issues/122315
60 lines
1.7 KiB
LLVM
60 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; Verify that MachineLICM recognizes that EH landing pad entry clobbers %r6/%r7
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;
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; RUN: llc < %s -verify-machineinstrs -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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declare i64 @personality(i64, i64, i64, ptr, ptr)
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declare void @callee(i64, i64, i64, i64, i64)
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declare void @panic()
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define void @test() uwtable personality ptr @personality {
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; CHECK-LABEL: test:
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; CHECK: .Lfunc_begin0:
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; CHECK-NEXT: .cfi_startproc
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; CHECK-NEXT: .cfi_personality 0, personality
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; CHECK-NEXT: .cfi_lsda 0, .Lexception0
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; CHECK-NEXT: # %bb.0: # %start
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; CHECK-NEXT: stmg %r6, %r15, 48(%r15)
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; CHECK-NEXT: .cfi_offset %r6, -112
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; CHECK-NEXT: .cfi_offset %r7, -104
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; CHECK-NEXT: .cfi_offset %r14, -48
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; CHECK-NEXT: .cfi_offset %r15, -40
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; CHECK-NEXT: aghi %r15, -160
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; CHECK-NEXT: .cfi_def_cfa_offset 320
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; CHECK-NEXT: .LBB0_1: # %bb1
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: lghi %r2, 0
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; CHECK-NEXT: lghi %r3, 0
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; CHECK-NEXT: lghi %r4, 0
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; CHECK-NEXT: lghi %r5, 0
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; CHECK-NEXT: lghi %r6, 0
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; CHECK-NEXT: brasl %r14, callee@PLT
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; CHECK-NEXT: .Ltmp0:
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; CHECK-NEXT: brasl %r14, panic@PLT
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; CHECK-NEXT: .Ltmp1:
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; CHECK-NEXT: j .LBB0_3
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; CHECK-NEXT: .LBB0_2: # %bb3
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; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
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; CHECK-NEXT: .Ltmp2:
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; CHECK-NEXT: j .LBB0_1
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; CHECK-NEXT: .LBB0_3: # %bb2
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; CHECK-NEXT: lmg %r6, %r15, 208(%r15)
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; CHECK-NEXT: br %r14
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start:
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br label %bb1
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bb1:
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call void @callee(i64 0, i64 0, i64 0, i64 0, i64 0)
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invoke void @panic()
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to label %bb2 unwind label %bb3
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bb2:
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ret void
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bb3:
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%lp = landingpad { ptr, i32 }
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catch ptr null
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br label %bb1
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}
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