a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
127 lines
3.0 KiB
LLVM
127 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; Test 32-bit logical shifts right.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check the low end of the SRL range.
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define i32 @f1(i32 %a) {
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; CHECK-LABEL: f1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srl %r2, 1
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; CHECK-NEXT: br %r14
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%shift = lshr i32 %a, 1
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ret i32 %shift
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}
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; Check the high end of the defined SRL range.
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define i32 @f2(i32 %a) {
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; CHECK-LABEL: f2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srl %r2, 31
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; CHECK-NEXT: br %r14
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%shift = lshr i32 %a, 31
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ret i32 %shift
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}
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; We don't generate shifts by out-of-range values.
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define i32 @f3(i32 %a) {
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; CHECK-LABEL: f3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: br %r14
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%shift = lshr i32 %a, 32
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ret i32 %shift
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}
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; Make sure that we don't generate negative shift amounts.
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define i32 @f4(i32 %a, i32 %amt) {
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; CHECK-LABEL: f4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: ahi %r3, -1
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; CHECK-NEXT: srl %r2, 0(%r3)
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; CHECK-NEXT: br %r14
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%sub = sub i32 %amt, 1
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%shift = lshr i32 %a, %sub
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ret i32 %shift
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}
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; Check variable shifts.
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define i32 @f5(i32 %a, i32 %amt) {
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; CHECK-LABEL: f5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srl %r2, 0(%r3)
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; CHECK-NEXT: br %r14
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%shift = lshr i32 %a, %amt
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ret i32 %shift
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}
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; Check shift amounts that have a constant term.
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define i32 @f6(i32 %a, i32 %amt) {
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; CHECK-LABEL: f6:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srl %r2, 10(%r3)
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; CHECK-NEXT: br %r14
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%add = add i32 %amt, 10
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%shift = lshr i32 %a, %add
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ret i32 %shift
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}
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; ...and again with a truncated 64-bit shift amount.
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define i32 @f7(i32 %a, i64 %amt) {
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; CHECK-LABEL: f7:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srl %r2, 10(%r3)
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; CHECK-NEXT: br %r14
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%add = add i64 %amt, 10
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%trunc = trunc i64 %add to i32
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%shift = lshr i32 %a, %trunc
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ret i32 %shift
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}
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; Check shift amounts that have the largest in-range constant term. We could
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; mask the amount instead.
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define i32 @f8(i32 %a, i32 %amt) {
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; CHECK-LABEL: f8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srl %r2, 4095(%r3)
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; CHECK-NEXT: br %r14
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%add = add i32 %amt, 4095
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%shift = lshr i32 %a, %add
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ret i32 %shift
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}
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; Check the next value up. Again, we could mask the amount instead.
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define i32 @f9(i32 %a, i32 %amt) {
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; CHECK-LABEL: f9:
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; CHECK: # %bb.0:
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; CHECK-NEXT: ahi %r3, 4096
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; CHECK-NEXT: srl %r2, 0(%r3)
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; CHECK-NEXT: br %r14
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%add = add i32 %amt, 4096
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%shift = lshr i32 %a, %add
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ret i32 %shift
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}
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; Check that we don't try to generate "indexed" shifts.
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define i32 @f10(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: f10:
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; CHECK: # %bb.0:
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; CHECK-NEXT: ar %r3, %r4
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; CHECK-NEXT: srl %r2, 0(%r3)
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; CHECK-NEXT: br %r14
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%add = add i32 %b, %c
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%shift = lshr i32 %a, %add
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ret i32 %shift
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}
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; Check that the shift amount uses an address register. It cannot be in %r0.
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define i32 @f11(i32 %a, ptr %ptr) {
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; CHECK-LABEL: f11:
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; CHECK: # %bb.0:
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; CHECK-NEXT: l %r1, 0(%r3)
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; CHECK-NEXT: srl %r2, 0(%r1)
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; CHECK-NEXT: br %r14
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%amt = load i32, ptr %ptr
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%shift = lshr i32 %a, %amt
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ret i32 %shift
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}
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