Alexey Bataev bc8c4bbd79 [SLP][TTI][X86]Add addsub pattern cost estimation. (#76461) ...

SLP/TTI do not know about the cost estimation for addsub pattern,
supported by X86. Previously the support for pattern detection was added
(seeTTI::isLegalAltInstr), but the cost still did not estimated
properly.

2023-12-27 15:57:21 -05:00

..

AArch64

[Tests] Add disjoint flag to some tests (NFC)

2023-12-05 14:09:36 +01:00

AMDGPU

[InstCombine] Replace non-demanded undef vector with poison

2023-12-18 16:12:37 +01:00

ARM

[SLP][NFC]Add insertsubvector test with small source vector, NFC.

2023-10-05 06:03:58 -07:00

NVPTX

[Tests] Add disjoint flag to some tests (NFC)

2023-12-05 14:09:36 +01:00

PowerPC

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RISCV

[RISCV] Remove experimental from Vector Crypto extensions (#74213)

2023-12-18 22:04:22 -08:00

SystemZ

[slp] Tweak debug costing output to include VL

2023-08-30 09:13:19 -07:00

VE

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WebAssembly

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X86

[SLP][TTI][X86]Add addsub pattern cost estimation. (#76461)

2023-12-27 15:57:21 -05:00

XCore

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alt-cmp-vectorize.ll

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const-bool-logical-or-reduction.ll

[SLP]Fix PR66176: SLP incorrectly reorders select operands.

2023-09-15 03:57:36 -07:00

int_sideeffect.ll

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is_fpclass.ll

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phi-not-ordered.ll

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reschedule.ll

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slp-hr-with-reuse.ll

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slp-max-phi-size.ll

[SLP]Fix comparator for PHI nodes comparison.

2023-08-14 14:05:39 -07:00

slp-max-reg-size.ll

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slp-non-pow-2-insertelement.ll

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slp-umax-rdx-matcher-crash.ll

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slp-variable-insertelement.ll

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vectorizable-functions-inseltpoison.ll

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vectorizable-functions.ll

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