Files
clang-p2996/llvm/test/CodeGen/PowerPC/ppc-ctr-dead-code.ll
Roman Lebedev 428f36401b Reland "[SimplifyCFG] FoldBranchToCommonDest(): deal with mismatched IV's in PHI's in common successor block"
This reverts commit 37b8f09a4b,
and returns commit 1bd0b82e50.
The miscompile was in InstCombine, and it has been addressed.

This tries to approach the problem noted by @arsenm:
terrible codegen for `__builtin_fpclassify()`:
https://godbolt.org/z/388zqdE37

Just because the PHI in the common successor happens to have different
incoming values for these two blocks, doesn't mean we have to give up.
It's quite easy to deal with this, we just need to produce a select:
https://alive2.llvm.org/ce/z/000srb

Now, the cost model for this transform is rather overly strict,
so this will basically never fire. We tally all (over all preds)
the selects needed to the NumBonusInsts

Differential Revision: https://reviews.llvm.org/D139275
2022-12-17 05:18:54 +03:00

66 lines
2.6 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,V01,CHECK-V0
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr9 -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,V01,CHECK-V1
; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,V23,CHECK-V2
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,V23,CHECK-V3
; Function Attrs: norecurse nounwind readonly
define signext i32 @limit_loop(i32 signext %iters, ptr nocapture readonly %vec, i32 signext %limit) local_unnamed_addr {
; CHECK-LABEL: limit_loop:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmpwi 3, 0
; CHECK-NEXT: ble 0, .LBB0_4
; CHECK-NEXT: # %bb.1: # %for.body.preheader
; CHECK-NEXT: addi 4, 4, -4
; CHECK-NEXT: li 6, 1
; CHECK-NEXT: .p2align 5
; CHECK-NEXT: .LBB0_2: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: lwzu 7, 4(4)
; CHECK-NEXT: cmpd 1, 6, 3
; CHECK-NEXT: addi 6, 6, 1
; CHECK-NEXT: cmpw 7, 5
; CHECK-NEXT: crand 20, 0, 4
; CHECK-NEXT: bc 12, 20, .LBB0_2
; CHECK-NEXT: # %bb.3: # %cleanup.loopexit
; CHECK-NEXT: li 3, 1
; CHECK-NEXT: isellt 3, 0, 3
; CHECK-NEXT: clrldi 3, 3, 32
; CHECK-NEXT: blr
; CHECK-NEXT: .LBB0_4:
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: blr
entry:
%cmp5 = icmp sgt i32 %iters, 0
br i1 %cmp5, label %for.body.preheader, label %cleanup
for.body.preheader: ; preds = %entry
%0 = sext i32 %iters to i64
br label %for.body
for.cond: ; preds = %for.body
%cmp = icmp slt i64 %indvars.iv.next, %0
br i1 %cmp, label %for.body, label %cleanup
for.body: ; preds = %for.body.preheader, %for.cond
%indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.cond ]
%arrayidx = getelementptr inbounds i32, ptr %vec, i64 %indvars.iv
%1 = load i32, ptr %arrayidx, align 4
%cmp1 = icmp slt i32 %1, %limit
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
br i1 %cmp1, label %for.cond, label %cleanup
cleanup: ; preds = %for.body, %for.cond, %entry
%2 = phi i32 [ 0, %entry ], [ 0, %for.cond ], [ 1, %for.body ]
ret i32 %2
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK-V0: {{.*}}
; CHECK-V1: {{.*}}
; CHECK-V2: {{.*}}
; CHECK-V3: {{.*}}
; V01: {{.*}}
; V23: {{.*}}