428f36401b
This reverts commit37b8f09a4b, and returns commit1bd0b82e50. The miscompile was in InstCombine, and it has been addressed. This tries to approach the problem noted by @arsenm: terrible codegen for `__builtin_fpclassify()`: https://godbolt.org/z/388zqdE37 Just because the PHI in the common successor happens to have different incoming values for these two blocks, doesn't mean we have to give up. It's quite easy to deal with this, we just need to produce a select: https://alive2.llvm.org/ce/z/000srb Now, the cost model for this transform is rather overly strict, so this will basically never fire. We tally all (over all preds) the selects needed to the NumBonusInsts Differential Revision: https://reviews.llvm.org/D139275
162 lines
4.2 KiB
LLVM
162 lines
4.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
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; Test basic folding to a conditional branch.
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define i32 @foo(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[EQ_NOT:%.*]] = icmp ne i64 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[LT:%.*]] = icmp slt i64 [[X]], [[Y]]
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; CHECK-NEXT: [[RETVAL_SEL:%.*]] = select i1 [[EQ_NOT]], i32 0, i32 2
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; CHECK-NEXT: [[OR_COND:%.*]] = and i1 [[EQ_NOT]], [[LT]]
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; CHECK-NEXT: br i1 [[OR_COND]], label [[A:%.*]], label [[B:%.*]]
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; CHECK: common.ret:
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; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ 1, [[A]] ], [ [[RETVAL_SEL]], [[B]] ]
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; CHECK-NEXT: ret i32 [[COMMON_RET_OP]]
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; CHECK: a:
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; CHECK-NEXT: tail call void @bees.a() #[[ATTR0:[0-9]+]]
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; CHECK-NEXT: br label [[COMMON_RET:%.*]]
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; CHECK: b:
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; CHECK-NEXT: tail call void @bees.b() #[[ATTR0]]
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; CHECK-NEXT: br label [[COMMON_RET]]
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;
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entry:
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%eq = icmp eq i64 %x, %y
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br i1 %eq, label %b, label %switch
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switch:
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%lt = icmp slt i64 %x, %y
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%qux = select i1 %lt, i32 0, i32 2
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switch i32 %qux, label %bees [
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i32 0, label %a
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i32 1, label %b
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i32 2, label %b
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]
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a:
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tail call void @bees.a() nounwind
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ret i32 1
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b:
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%retval = phi i32 [0, %switch], [0, %switch], [2, %entry]
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tail call void @bees.b() nounwind
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ret i32 %retval
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bees:
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tail call void @llvm.trap() nounwind
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unreachable
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}
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; Test basic folding to an unconditional branch.
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define i32 @bar(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: @bar(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: tail call void @bees.a() #[[ATTR0]]
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; CHECK-NEXT: ret i32 0
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;
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entry:
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%lt = icmp slt i64 %x, %y
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%qux = select i1 %lt, i32 0, i32 2
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switch i32 %qux, label %bees [
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i32 0, label %a
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i32 1, label %b
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i32 2, label %a
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]
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a:
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%retval = phi i32 [0, %entry], [0, %entry], [1, %b]
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tail call void @bees.a() nounwind
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ret i32 0
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b:
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tail call void @bees.b() nounwind
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br label %a
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bees:
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tail call void @llvm.trap() nounwind
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unreachable
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}
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; Test the edge case where both values from the select are the default case.
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define void @bazz(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: @bazz(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: tail call void @bees.b() #[[ATTR0]]
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; CHECK-NEXT: ret void
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;
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entry:
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%lt = icmp slt i64 %x, %y
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%qux = select i1 %lt, i32 10, i32 12
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switch i32 %qux, label %b [
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i32 0, label %a
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i32 1, label %bees
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i32 2, label %bees
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]
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a:
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tail call void @bees.a() nounwind
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ret void
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b:
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tail call void @bees.b() nounwind
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ret void
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bees:
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tail call void @llvm.trap()
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unreachable
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}
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; Test the edge case where both values from the select are equal.
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define void @quux(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: @quux(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: tail call void @bees.a() #[[ATTR0]]
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; CHECK-NEXT: ret void
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;
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entry:
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%lt = icmp slt i64 %x, %y
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%qux = select i1 %lt, i32 0, i32 0
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switch i32 %qux, label %b [
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i32 0, label %a
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i32 1, label %bees
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i32 2, label %bees
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]
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a:
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tail call void @bees.a() nounwind
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ret void
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b:
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tail call void @bees.b() nounwind
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ret void
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bees:
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tail call void @llvm.trap()
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unreachable
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}
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; A final test, for phi node munging.
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define i32 @xyzzy(i64 %x, i64 %y) {
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; CHECK-LABEL: @xyzzy(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[EQ_NOT:%.*]] = icmp ne i64 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[LT:%.*]] = icmp slt i64 [[X]], [[Y]]
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; CHECK-NEXT: [[VAL_SEL:%.*]] = select i1 [[EQ_NOT]], i32 1, i32 0
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; CHECK-NEXT: [[OR_COND:%.*]] = and i1 [[EQ_NOT]], [[LT]]
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; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = select i1 [[OR_COND]], i32 -1, i32 [[VAL_SEL]]
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; CHECK-NEXT: ret i32 [[COMMON_RET_OP]]
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;
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entry:
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%eq = icmp eq i64 %x, %y
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br i1 %eq, label %r, label %cont
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cont:
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%lt = icmp slt i64 %x, %y
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%qux = select i1 %lt, i32 0, i32 2
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switch i32 %qux, label %bees [
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i32 0, label %a
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i32 1, label %r
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i32 2, label %r
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]
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r:
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%val = phi i32 [0, %entry], [1, %cont], [1, %cont]
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ret i32 %val
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a:
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ret i32 -1
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bees:
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tail call void @llvm.trap()
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unreachable
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}
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declare void @llvm.trap() nounwind noreturn
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declare void @bees.a() nounwind
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declare void @bees.b() nounwind
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; CHECK: attributes #1 = { cold noreturn nounwind }
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