d96161a179
c17d9b4b12 added REQUIRES lines to a lot of Arm and AArch64
test, but added them to the very beginning, before the existing
update_cc_test_checks lines. This just moves them later so as to not
mess up the existing ordering when the checks are regenerated.
55 lines
2.3 KiB
C++
55 lines
2.3 KiB
C++
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=1 -mvscale-max=1 -flax-vector-conversions=none -fallow-half-arguments-and-returns -ffreestanding -fsyntax-only -verify %s
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=2 -mvscale-max=2 -flax-vector-conversions=none -fallow-half-arguments-and-returns -ffreestanding -fsyntax-only -verify %s
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=4 -mvscale-max=4 -flax-vector-conversions=none -fallow-half-arguments-and-returns -ffreestanding -fsyntax-only -verify %s
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=8 -mvscale-max=8 -flax-vector-conversions=none -fallow-half-arguments-and-returns -ffreestanding -fsyntax-only -verify %s
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -mvscale-min=16 -mvscale-max=16 -flax-vector-conversions=none -fallow-half-arguments-and-returns -ffreestanding -fsyntax-only -verify %s
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// REQUIRES: aarch64-registered-target || arm-registered-target
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// expected-no-diagnostics
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#include <arm_sve.h>
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#define N __ARM_FEATURE_SVE_BITS
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#define FIXED_ATTR __attribute__((arm_sve_vector_bits(N)))
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typedef svfloat32_t fixed_float32_t FIXED_ATTR;
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typedef svfloat64_t fixed_float64_t FIXED_ATTR;
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typedef svint32_t fixed_int32_t FIXED_ATTR;
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typedef svint64_t fixed_int64_t FIXED_ATTR;
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typedef svbool_t fixed_bool_t FIXED_ATTR;
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// SVE VLSTs can be cast to SVE VLATs, regardless of lane size.
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// NOTE: the list below is NOT exhaustive for all SVE types.
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#define CAST(from, to) \
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void from##_to_##to(from a, to b) { \
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b = (to) a; \
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}
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#define TESTCASE(ty1, ty2) \
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CAST(ty1, ty2) \
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CAST(ty2, ty1)
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TESTCASE(fixed_float32_t, svfloat32_t)
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TESTCASE(fixed_float32_t, svfloat64_t)
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TESTCASE(fixed_float32_t, svint32_t)
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TESTCASE(fixed_float32_t, svint64_t)
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TESTCASE(fixed_float64_t, svfloat32_t)
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TESTCASE(fixed_float64_t, svfloat64_t)
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TESTCASE(fixed_float64_t, svint32_t)
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TESTCASE(fixed_float64_t, svint64_t)
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TESTCASE(fixed_int32_t, svfloat32_t)
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TESTCASE(fixed_int32_t, svfloat64_t)
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TESTCASE(fixed_int32_t, svint32_t)
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TESTCASE(fixed_int32_t, svint64_t)
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TESTCASE(fixed_int64_t, svfloat32_t)
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TESTCASE(fixed_int64_t, svfloat64_t)
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TESTCASE(fixed_int64_t, svint32_t)
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TESTCASE(fixed_int64_t, svint64_t)
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TESTCASE(fixed_bool_t, svbool_t)
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