0928368f62
This adds the Arm Optimized Routines (see https://github.com/ARM-software/optimized-routines) source code under the the LLVM license. The version of the code provided in this patch is v20.02 of the Arm Optimized Routines project. This entire contribution is being committed as is even though it does not currently fit the LLVM libc model and does not follow the LLVM coding style. In the near future, implementations from this patch will be moved over to their right place in the LLVM-libc tree. This will be done over many small patches, all of which will go through the normal LLVM code review process. See this libc-dev post for the plan: http://lists.llvm.org/pipermail/libc-dev/2020-March/000044.html Differential revision of the original upload: https://reviews.llvm.org/D75355
85 lines
2.3 KiB
C
85 lines
2.3 KiB
C
/*
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* Single-precision vector e^x function.
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*/
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#include "mathlib.h"
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#include "v_math.h"
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#if V_SUPPORTED
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static const float Poly[] = {
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/* maxerr: 1.45358 +0.5 ulp. */
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0x1.0e4020p-7f,
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0x1.573e2ep-5f,
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0x1.555e66p-3f,
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0x1.fffdb6p-2f,
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0x1.ffffecp-1f,
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};
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#define C0 v_f32 (Poly[0])
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#define C1 v_f32 (Poly[1])
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#define C2 v_f32 (Poly[2])
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#define C3 v_f32 (Poly[3])
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#define C4 v_f32 (Poly[4])
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#define Shift v_f32 (0x1.8p23f)
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#define InvLn2 v_f32 (0x1.715476p+0f)
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#define Ln2hi v_f32 (0x1.62e4p-1f)
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#define Ln2lo v_f32 (0x1.7f7d1cp-20f)
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VPCS_ATTR
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static v_f32_t
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specialcase (v_f32_t poly, v_f32_t n, v_u32_t e, v_f32_t absn, v_u32_t cmp1, v_f32_t scale)
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{
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/* 2^n may overflow, break it up into s1*s2. */
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v_u32_t b = v_cond_u32 (n <= v_f32 (0.0f)) & v_u32 (0x82000000);
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v_f32_t s1 = v_as_f32_u32 (v_u32 (0x7f000000) + b);
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v_f32_t s2 = v_as_f32_u32 (e - b);
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v_u32_t cmp2 = v_cond_u32 (absn > v_f32 (192.0f));
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v_u32_t r2 = v_as_u32_f32 (s1 * s1);
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v_u32_t r1 = v_as_u32_f32 (v_fma_f32 (poly, s2, s2) * s1);
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/* Similar to r1 but avoids double rounding in the subnormal range. */
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v_u32_t r0 = v_as_u32_f32 (v_fma_f32 (poly, scale, scale));
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return v_as_f32_u32 ((cmp2 & r2) | (~cmp2 & cmp1 & r1) | (~cmp1 & r0));
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}
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VPCS_ATTR
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v_f32_t
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V_NAME(expf) (v_f32_t x)
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{
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v_f32_t n, r, r2, scale, p, q, poly, absn, z;
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v_u32_t cmp, e;
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/* exp(x) = 2^n (1 + poly(r)), with 1 + poly(r) in [1/sqrt(2),sqrt(2)]
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x = ln2*n + r, with r in [-ln2/2, ln2/2]. */
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#if 1
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z = v_fma_f32 (x, InvLn2, Shift);
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n = z - Shift;
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r = v_fma_f32 (n, -Ln2hi, x);
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r = v_fma_f32 (n, -Ln2lo, r);
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e = v_as_u32_f32 (z) << 23;
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#else
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z = x * InvLn2;
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n = v_round_f32 (z);
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r = v_fma_f32 (n, -Ln2hi, x);
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r = v_fma_f32 (n, -Ln2lo, r);
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e = v_as_u32_s32 (v_round_s32 (z)) << 23;
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#endif
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scale = v_as_f32_u32 (e + v_u32 (0x3f800000));
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absn = v_abs_f32 (n);
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cmp = v_cond_u32 (absn > v_f32 (126.0f));
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r2 = r * r;
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p = v_fma_f32 (C0, r, C1);
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q = v_fma_f32 (C2, r, C3);
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q = v_fma_f32 (p, r2, q);
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p = C4 * r;
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poly = v_fma_f32 (q, r2, p);
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if (unlikely (v_any_u32 (cmp)))
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return specialcase (poly, n, e, absn, cmp, scale);
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return v_fma_f32 (poly, scale, scale);
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}
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VPCS_ALIAS
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#endif
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