0928368f62
This adds the Arm Optimized Routines (see https://github.com/ARM-software/optimized-routines) source code under the the LLVM license. The version of the code provided in this patch is v20.02 of the Arm Optimized Routines project. This entire contribution is being committed as is even though it does not currently fit the LLVM libc model and does not follow the LLVM coding style. In the near future, implementations from this patch will be moved over to their right place in the LLVM-libc tree. This will be done over many small patches, all of which will go through the normal LLVM code review process. See this libc-dev post for the plan: http://lists.llvm.org/pipermail/libc-dev/2020-March/000044.html Differential revision of the original upload: https://reviews.llvm.org/D75355
75 lines
1.8 KiB
C
75 lines
1.8 KiB
C
/*
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* Single-precision vector log function.
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*/
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#include "mathlib.h"
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#include "v_math.h"
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#if V_SUPPORTED
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static const float Poly[] = {
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/* 3.34 ulp error */
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-0x1.3e737cp-3f, 0x1.5a9aa2p-3f, -0x1.4f9934p-3f, 0x1.961348p-3f,
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-0x1.00187cp-2f, 0x1.555d7cp-2f, -0x1.ffffc8p-2f,
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};
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#define P7 v_f32 (Poly[0])
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#define P6 v_f32 (Poly[1])
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#define P5 v_f32 (Poly[2])
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#define P4 v_f32 (Poly[3])
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#define P3 v_f32 (Poly[4])
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#define P2 v_f32 (Poly[5])
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#define P1 v_f32 (Poly[6])
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#define Ln2 v_f32 (0x1.62e43p-1f) /* 0x3f317218 */
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#define Min v_u32 (0x00800000)
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#define Max v_u32 (0x7f800000)
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#define Mask v_u32 (0x007fffff)
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#define Off v_u32 (0x3f2aaaab) /* 0.666667 */
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VPCS_ATTR
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__attribute__ ((noinline)) static v_f32_t
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specialcase (v_f32_t x, v_f32_t y, v_u32_t cmp)
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{
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/* Fall back to scalar code. */
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return v_call_f32 (logf, x, y, cmp);
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}
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VPCS_ATTR
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v_f32_t
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V_NAME(logf) (v_f32_t x)
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{
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v_f32_t n, p, q, r, r2, y;
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v_u32_t u, cmp;
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u = v_as_u32_f32 (x);
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cmp = v_cond_u32 (u - Min >= Max - Min);
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/* x = 2^n * (1+r), where 2/3 < 1+r < 4/3 */
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u -= Off;
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n = v_to_f32_s32 (v_as_s32_u32 (u) >> 23); /* signextend */
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u &= Mask;
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u += Off;
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r = v_as_f32_u32 (u) - v_f32 (1.0f);
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/* y = log(1+r) + n*ln2. */
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r2 = r * r;
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/* n*ln2 + r + r2*(P1 + r*P2 + r2*(P3 + r*P4 + r2*(P5 + r*P6 + r2*P7))). */
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p = v_fma_f32 (P6, r, P5);
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q = v_fma_f32 (P4, r, P3);
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y = v_fma_f32 (P2, r, P1);
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p = v_fma_f32 (P7, r2, p);
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q = v_fma_f32 (p, r2, q);
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y = v_fma_f32 (q, r2, y);
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p = v_fma_f32 (Ln2, n, r);
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y = v_fma_f32 (y, r2, p);
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if (unlikely (v_any_u32 (cmp)))
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return specialcase (x, y, cmp);
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return y;
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}
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VPCS_ALIAS
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#endif
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