f5f28d5b0c
This patch implements a new MachineFunction in the ARM backend for placing BTI instructions. It is similar to the existing AArch64 aarch64-branch-targets pass. BTI instructions are inserted into basic blocks that: - Have their address taken - Are the entry block of a function, if the function has external linkage or has its address taken - Are mentioned in jump tables - Are exception/cleanup landing pads Each BTI instructions is placed in the beginning of a BB after the so-called meta instructions (e.g. exception handler labels). Each outlining candidate and the outlined function need to be in agreement about whether BTI placement is enabled or not. If branch target enforcement is disabled for a function, the outliner should not covertly enable it by emitting a call to an outlined function, which begins with BTI. The cost mode of the outliner is adjusted to account for the extra BTI instructions in the outlined function. The ARM Constant Islands pass will maintain the count of the jump tables, which reference a block. A `BTI` instruction is removed from a block only if the reference count reaches zero. PAC instructions in entry blocks are replaced with PACBTI instructions (tests for this case will be added in a later patch because the compiler currently does not generate PAC instructions). The ARM Constant Island pass is adjusted to handle BTI instructions correctly. Functions with static linkage that don't have their address taken can still be called indirectly by linker-generated veneers and thus their entry points need be marked with BTI or PACBTI. The changes are tested using "LLVM IR -> assembly" tests, jump tables also have a MIR test. Unfortunately it is not possible add MIR tests for exception handling and computed gotos because of MIR parser limitations. This patch is part of a series that adds support for the PACBTI-M extension of the Armv8.1-M architecture, as detailed here: https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension The PACBTI-M specification can be found in the Armv8-M Architecture Reference Manual: https://developer.arm.com/documentation/ddi0553/latest The following people contributed to this patch: - Mikhail Maltsev - Momchil Velikov - Ties Stuij Reviewed By: ostannard Differential Revision: https://reviews.llvm.org/D112426
98 lines
2.4 KiB
CMake
98 lines
2.4 KiB
CMake
add_llvm_component_group(ARM HAS_JIT)
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set(LLVM_TARGET_DEFINITIONS ARM.td)
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tablegen(LLVM ARMGenAsmMatcher.inc -gen-asm-matcher)
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tablegen(LLVM ARMGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM ARMGenCallingConv.inc -gen-callingconv)
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tablegen(LLVM ARMGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM ARMGenDisassemblerTables.inc -gen-disassembler)
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tablegen(LLVM ARMGenFastISel.inc -gen-fast-isel)
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tablegen(LLVM ARMGenGlobalISel.inc -gen-global-isel)
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tablegen(LLVM ARMGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM ARMGenMCCodeEmitter.inc -gen-emitter)
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tablegen(LLVM ARMGenMCPseudoLowering.inc -gen-pseudo-lowering)
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tablegen(LLVM ARMGenRegisterBank.inc -gen-register-bank)
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tablegen(LLVM ARMGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM ARMGenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM ARMGenSystemRegister.inc -gen-searchable-tables)
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add_public_tablegen_target(ARMCommonTableGen)
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add_llvm_target(ARMCodeGen
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A15SDOptimizer.cpp
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ARMAsmPrinter.cpp
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ARMBaseInstrInfo.cpp
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ARMBaseRegisterInfo.cpp
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ARMBasicBlockInfo.cpp
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ARMBranchTargets.cpp
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ARMCallingConv.cpp
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ARMCallLowering.cpp
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ARMConstantIslandPass.cpp
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ARMConstantPoolValue.cpp
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ARMExpandPseudoInsts.cpp
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ARMFastISel.cpp
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ARMFrameLowering.cpp
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ARMHazardRecognizer.cpp
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ARMInstructionSelector.cpp
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ARMISelDAGToDAG.cpp
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ARMISelLowering.cpp
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ARMInstrInfo.cpp
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ARMLegalizerInfo.cpp
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ARMParallelDSP.cpp
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ARMLoadStoreOptimizer.cpp
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ARMLowOverheadLoops.cpp
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ARMBlockPlacement.cpp
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ARMMCInstLower.cpp
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ARMMachineFunctionInfo.cpp
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ARMMacroFusion.cpp
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ARMRegisterInfo.cpp
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ARMOptimizeBarriersPass.cpp
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ARMRegisterBankInfo.cpp
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ARMSelectionDAGInfo.cpp
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ARMSLSHardening.cpp
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ARMSubtarget.cpp
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ARMTargetMachine.cpp
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ARMTargetObjectFile.cpp
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ARMTargetTransformInfo.cpp
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MLxExpansionPass.cpp
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MVEGatherScatterLowering.cpp
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MVELaneInterleavingPass.cpp
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MVETailPredication.cpp
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MVEVPTBlockPass.cpp
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MVETPAndVPTOptimisationsPass.cpp
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Thumb1FrameLowering.cpp
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Thumb1InstrInfo.cpp
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ThumbRegisterInfo.cpp
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Thumb2ITBlockPass.cpp
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Thumb2InstrInfo.cpp
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Thumb2SizeReduction.cpp
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LINK_COMPONENTS
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ARMDesc
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ARMInfo
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Analysis
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AsmPrinter
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CodeGen
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Core
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IPO
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MC
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Scalar
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SelectionDAG
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Support
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Target
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GlobalISel
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ARMUtils
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TransformUtils
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CFGuard
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ADD_TO_COMPONENT
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ARM
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)
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add_subdirectory(AsmParser)
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add_subdirectory(Disassembler)
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add_subdirectory(MCTargetDesc)
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add_subdirectory(TargetInfo)
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add_subdirectory(Utils)
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