bde1032588
This is a fix for a crash in the HexagonOptAddrMode pass that was looking for the third operand (offset) in the following instruction that does not, in fact, have a third operand: $r1 = L2_loadw_locked $r1 Additionally, this patch also adds an addrMode value to vgather pseudos in the Hexagon backend. Differential Revision: https://reviews.llvm.org/D117133
79 lines
3.4 KiB
TableGen
79 lines
3.4 KiB
TableGen
//==- HexagonPatternsV65.td -------------------------------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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multiclass vgathermh<RegisterClass RC> {
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let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1,
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mayStore = 1, addrMode = BaseImmOffset, accessSize = HalfWordAccess in
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def NAME : CVI_GATHER_TMP_LD_Resource_NoOpcode<(outs ),
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(ins IntRegs:$_dst_, s4_0Imm:$Ii,
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IntRegs:$Rt, ModRegs:$Mu, RC:$Vv),
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".error \"should not emit\" ",
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[]>;
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}
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multiclass vgathermw<RegisterClass RC> {
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let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1,
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mayStore = 1, addrMode = BaseImmOffset, accessSize = WordAccess in
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def NAME : CVI_GATHER_TMP_LD_Resource_NoOpcode<(outs ),
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(ins IntRegs:$_dst_, s4_0Imm:$Ii,
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IntRegs:$Rt, ModRegs:$Mu, RC:$Vv),
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".error \"should not emit\" ",
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[]>;
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}
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multiclass vgathermhw<RegisterClass RC> {
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let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1,
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mayStore = 1, addrMode = BaseImmOffset, accessSize = HalfWordAccess in
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def NAME : CVI_GATHER_TMP_LD_Resource_NoOpcode<(outs ),
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(ins IntRegs:$_dst_, s4_0Imm:$Ii,
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IntRegs:$Rt, ModRegs:$Mu, RC:$Vv),
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".error \"should not emit\" ",
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[]>;
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}
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defm V6_vgathermh_pseudo : vgathermh<HvxVR>;
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defm V6_vgathermw_pseudo : vgathermw<HvxVR>;
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defm V6_vgathermhw_pseudo : vgathermhw<HvxWR>;
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multiclass vgathermhq<RegisterClass RC1, RegisterClass RC2> {
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let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1,
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mayStore = 1, addrMode = BaseImmOffset, accessSize = HalfWordAccess in
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def NAME : CVI_GATHER_TMP_LD_Resource_NoOpcode<(outs ),
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(ins IntRegs:$_dst_, s4_0Imm:$Ii,
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RC2:$Vq, IntRegs:$Rt, ModRegs:$Mu,
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RC1:$Vv),
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".error \"should not emit\" ",
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[]>;
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}
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multiclass vgathermwq<RegisterClass RC1, RegisterClass RC2> {
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let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1,
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mayStore = 1, addrMode = BaseImmOffset, accessSize = WordAccess in
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def NAME : CVI_GATHER_TMP_LD_Resource_NoOpcode<(outs ),
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(ins IntRegs:$_dst_, s4_0Imm:$Ii,
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RC2:$Vq, IntRegs:$Rt, ModRegs:$Mu,
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RC1:$Vv),
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".error \"should not emit\" ",
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[]>;
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}
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multiclass vgathermhwq<RegisterClass RC1, RegisterClass RC2> {
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let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1,
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mayStore = 1, addrMode = BaseImmOffset, accessSize = HalfWordAccess in
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def NAME : CVI_GATHER_TMP_LD_Resource_NoOpcode<(outs ),
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(ins IntRegs:$_dst_, s4_0Imm:$Ii,
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RC2:$Vq, IntRegs:$Rt, ModRegs:$Mu,
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RC1:$Vv),
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".error \"should not emit\" ",
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[]>;
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}
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defm V6_vgathermhq_pseudo : vgathermhq<HvxVR, HvxQR>;
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defm V6_vgathermwq_pseudo : vgathermwq<HvxVR, HvxQR>;
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defm V6_vgathermhwq_pseudo : vgathermhwq<HvxWR, HvxQR>;
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