Summary: This catches malformed mir files which specify alignment as log2 instead of pow2. See https://reviews.llvm.org/D65945 for reference, This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: MatzeB, qcolombet, dschuff, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, s.egerton, pzheng, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67433 llvm-svn: 371608
118 lines
2.7 KiB
YAML
118 lines
2.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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...
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---
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name: bswap_s32
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: bswap_s32
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; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK: [[REVWr:%[0-9]+]]:gpr32 = REVWr [[COPY]]
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; CHECK: $w0 = COPY [[REVWr]]
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%0(s32) = COPY $w0
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%1(s32) = G_BSWAP %0
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$w0 = COPY %1
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...
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---
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name: bswap_s64
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: bswap_s64
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: [[REVXr:%[0-9]+]]:gpr64 = REVXr [[COPY]]
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; CHECK: $x0 = COPY [[REVXr]]
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%0(s64) = COPY $x0
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%1(s64) = G_BSWAP %0
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$x0 = COPY %1
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...
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---
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name: bswap_v4s32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $q0
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; CHECK-LABEL: name: bswap_v4s32
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; CHECK: liveins: $q0
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; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
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; CHECK: [[REV32v16i8_:%[0-9]+]]:fpr128 = REV32v16i8 [[COPY]]
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; CHECK: $q0 = COPY [[REV32v16i8_]]
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; CHECK: RET_ReallyLR implicit $q0
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%0:fpr(<4 x s32>) = COPY $q0
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%1:fpr(<4 x s32>) = G_BSWAP %0
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$q0 = COPY %1(<4 x s32>)
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RET_ReallyLR implicit $q0
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...
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---
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name: bswap_v2s32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $d0
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; CHECK-LABEL: name: bswap_v2s32
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; CHECK: liveins: $d0
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; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
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; CHECK: [[REV32v8i8_:%[0-9]+]]:fpr64 = REV32v8i8 [[COPY]]
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; CHECK: $d0 = COPY [[REV32v8i8_]]
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; CHECK: RET_ReallyLR implicit $d0
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%0:fpr(<2 x s32>) = COPY $d0
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%1:fpr(<2 x s32>) = G_BSWAP %0
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$d0 = COPY %1(<2 x s32>)
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RET_ReallyLR implicit $d0
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...
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---
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name: bswap_v2s64
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $q0
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; CHECK-LABEL: name: bswap_v2s64
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; CHECK: liveins: $q0
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; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
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; CHECK: [[REV64v16i8_:%[0-9]+]]:fpr128 = REV64v16i8 [[COPY]]
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; CHECK: $q0 = COPY [[REV64v16i8_]]
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; CHECK: RET_ReallyLR implicit $q0
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%0:fpr(<2 x s64>) = COPY $q0
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%1:fpr(<2 x s64>) = G_BSWAP %0
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$q0 = COPY %1(<2 x s64>)
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RET_ReallyLR implicit $q0
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...
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