d7d85f72ef
When creating G_SBFX/G_UBFX opcodes, the last operand is the width instead of the bit position. The bit position is used for the AArch64 SBFM and UBFM instructions. The bit position is converted to a width if the SBFX/UBFX aliases are generated. For other SBMF/UBFM aliases, such as shifts, the bit position is used. Differential Revision: https://reviews.llvm.org/D101543
111 lines
3.0 KiB
YAML
111 lines
3.0 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
|
# RUN: llc -mtriple=aarch64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
|
|
|
|
...
|
|
---
|
|
name: sbfx_s32
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
liveins: $w0
|
|
; CHECK-LABEL: name: sbfx_s32
|
|
; CHECK: liveins: $w0
|
|
; CHECK: %copy:gpr32 = COPY $w0
|
|
; CHECK: %sbfx:gpr32 = SBFMWri %copy, 0, 9
|
|
; CHECK: $w0 = COPY %sbfx
|
|
; CHECK: RET_ReallyLR implicit $w0
|
|
%copy:gpr(s32) = COPY $w0
|
|
%cst1:gpr(s32) = G_CONSTANT i32 0
|
|
%cst2:gpr(s32) = G_CONSTANT i32 10
|
|
%sbfx:gpr(s32) = G_SBFX %copy, %cst1, %cst2
|
|
$w0 = COPY %sbfx
|
|
RET_ReallyLR implicit $w0
|
|
|
|
...
|
|
---
|
|
name: sbfx_s64
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
liveins: $x0
|
|
; CHECK-LABEL: name: sbfx_s64
|
|
; CHECK: liveins: $x0
|
|
; CHECK: %copy:gpr64 = COPY $x0
|
|
; CHECK: %sbfx:gpr64 = SBFMXri %copy, 0, 9
|
|
; CHECK: $x0 = COPY %sbfx
|
|
; CHECK: RET_ReallyLR implicit $x0
|
|
%copy:gpr(s64) = COPY $x0
|
|
%cst1:gpr(s64) = G_CONSTANT i64 0
|
|
%cst2:gpr(s64) = G_CONSTANT i64 10
|
|
%sbfx:gpr(s64) = G_SBFX %copy, %cst1, %cst2
|
|
$x0 = COPY %sbfx
|
|
RET_ReallyLR implicit $x0
|
|
|
|
...
|
|
---
|
|
name: sbfx_s32_31_1
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
liveins: $w0
|
|
; This is just an asr, so it's okay.
|
|
|
|
; CHECK-LABEL: name: sbfx_s32_31_1
|
|
; CHECK: liveins: $w0
|
|
; CHECK: %copy:gpr32 = COPY $w0
|
|
; CHECK: %sbfx:gpr32 = SBFMWri %copy, 31, 31
|
|
; CHECK: $w0 = COPY %sbfx
|
|
; CHECK: RET_ReallyLR implicit $w0
|
|
%copy:gpr(s32) = COPY $w0
|
|
%cst1:gpr(s32) = G_CONSTANT i32 31
|
|
%cst2:gpr(s32) = G_CONSTANT i32 1
|
|
%sbfx:gpr(s32) = G_SBFX %copy, %cst1, %cst2
|
|
$w0 = COPY %sbfx
|
|
RET_ReallyLR implicit $w0
|
|
---
|
|
name: sbfx_s32_10_5
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
liveins: $w0
|
|
; CHECK-LABEL: name: sbfx_s32_10_5
|
|
; CHECK: liveins: $w0
|
|
; CHECK: %copy:gpr32 = COPY $w0
|
|
; CHECK: %sbfx:gpr32 = SBFMWri %copy, 10, 14
|
|
; CHECK: $w0 = COPY %sbfx
|
|
; CHECK: RET_ReallyLR implicit $w0
|
|
%copy:gpr(s32) = COPY $w0
|
|
%cst1:gpr(s32) = G_CONSTANT i32 10
|
|
%cst2:gpr(s32) = G_CONSTANT i32 5
|
|
%sbfx:gpr(s32) = G_SBFX %copy, %cst1, %cst2
|
|
$w0 = COPY %sbfx
|
|
RET_ReallyLR implicit $w0
|
|
---
|
|
name: sbfx_s64_10_5
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
liveins: $x0
|
|
; CHECK-LABEL: name: sbfx_s64_10_5
|
|
; CHECK: liveins: $x0
|
|
; CHECK: %copy:gpr64 = COPY $x0
|
|
; CHECK: %sbfx:gpr64 = SBFMXri %copy, 10, 14
|
|
; CHECK: $x0 = COPY %sbfx
|
|
; CHECK: RET_ReallyLR implicit $x0
|
|
%copy:gpr(s64) = COPY $x0
|
|
%cst1:gpr(s64) = G_CONSTANT i64 10
|
|
%cst2:gpr(s64) = G_CONSTANT i64 5
|
|
%sbfx:gpr(s64) = G_SBFX %copy, %cst1, %cst2
|
|
$x0 = COPY %sbfx
|
|
RET_ReallyLR implicit $x0
|