d7d85f72ef
When creating G_SBFX/G_UBFX opcodes, the last operand is the width instead of the bit position. The bit position is used for the AArch64 SBFM and UBFM instructions. The bit position is converted to a width if the SBFX/UBFX aliases are generated. For other SBMF/UBFM aliases, such as shifts, the bit position is used. Differential Revision: https://reviews.llvm.org/D101543
114 lines
3.0 KiB
YAML
114 lines
3.0 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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...
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---
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name: ubfx_s32
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: ubfx_s32
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; CHECK: liveins: $w0
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; CHECK: %copy:gpr32 = COPY $w0
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; CHECK: %ubfx:gpr32 = UBFMWri %copy, 0, 9
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; CHECK: $w0 = COPY %ubfx
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; CHECK: RET_ReallyLR implicit $w0
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%copy:gpr(s32) = COPY $w0
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%cst1:gpr(s32) = G_CONSTANT i32 0
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%cst2:gpr(s32) = G_CONSTANT i32 10
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%ubfx:gpr(s32) = G_UBFX %copy, %cst1, %cst2
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$w0 = COPY %ubfx
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RET_ReallyLR implicit $w0
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...
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---
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name: ubfx_s64
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: ubfx_s64
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; CHECK: liveins: $x0
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; CHECK: %copy:gpr64 = COPY $x0
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; CHECK: %ubfx:gpr64 = UBFMXri %copy, 0, 9
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; CHECK: $x0 = COPY %ubfx
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; CHECK: RET_ReallyLR implicit $x0
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%copy:gpr(s64) = COPY $x0
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%cst1:gpr(s64) = G_CONSTANT i64 0
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%cst2:gpr(s64) = G_CONSTANT i64 10
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%ubfx:gpr(s64) = G_UBFX %copy, %cst1, %cst2
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$x0 = COPY %ubfx
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RET_ReallyLR implicit $x0
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...
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---
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name: ubfx_s32_31_1
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0
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; This is just a lsr, so it's okay.
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; CHECK-LABEL: name: ubfx_s32_31_1
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; CHECK: liveins: $w0
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; CHECK: %copy:gpr32 = COPY $w0
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; CHECK: %ubfx:gpr32 = UBFMWri %copy, 31, 31
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; CHECK: $w0 = COPY %ubfx
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; CHECK: RET_ReallyLR implicit $w0
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%copy:gpr(s32) = COPY $w0
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%cst1:gpr(s32) = G_CONSTANT i32 31
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%cst2:gpr(s32) = G_CONSTANT i32 1
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%ubfx:gpr(s32) = G_UBFX %copy, %cst1, %cst2
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$w0 = COPY %ubfx
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RET_ReallyLR implicit $w0
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---
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name: ubfx_s32_10_5
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: ubfx_s32_10_5
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; CHECK: liveins: $w0
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; CHECK: %copy:gpr32 = COPY $w0
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; CHECK: %ubfx:gpr32 = UBFMWri %copy, 10, 14
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; CHECK: $w0 = COPY %ubfx
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; CHECK: RET_ReallyLR implicit $w0
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%copy:gpr(s32) = COPY $w0
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%cst1:gpr(s32) = G_CONSTANT i32 10
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%cst2:gpr(s32) = G_CONSTANT i32 5
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%ubfx:gpr(s32) = G_UBFX %copy, %cst1, %cst2
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$w0 = COPY %ubfx
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RET_ReallyLR implicit $w0
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...
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---
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name: ubfx_s64_10_5
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: ubfx_s64_10_5
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; CHECK: liveins: $x0
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; CHECK: %copy:gpr64 = COPY $x0
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; CHECK: %ubfx:gpr64 = UBFMXri %copy, 10, 14
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; CHECK: $x0 = COPY %ubfx
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; CHECK: RET_ReallyLR implicit $x0
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%copy:gpr(s64) = COPY $x0
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%cst1:gpr(s64) = G_CONSTANT i64 10
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%cst2:gpr(s64) = G_CONSTANT i64 5
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%ubfx:gpr(s64) = G_UBFX %copy, %cst1, %cst2
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$x0 = COPY %ubfx
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RET_ReallyLR implicit $x0
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