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be1294de9dd93ae02002bd1aa4b4a8d62e562c21
clang-p2996/llvm/test/CodeGen/AArch64/arm64-indexed-memory.ll
David Green adec922361 [AArch64] Make -mcpu=generic schedule for an in-order core 
We would like to start pushing -mcpu=generic towards enabling the set of
features that improves performance for some CPUs, without hurting any
others. A blend of the performance options hopefully beneficial to all
CPUs. The largest part of that is enabling in-order scheduling using the
Cortex-A55 schedule model. This is similar to the Arm backend change
from eecb353d0e which made -mcpu=generic perform in-order scheduling
using the cortex-a8 schedule model.

The idea is that in-order cpu's require the most help in instruction
scheduling, whereas out-of-order cpus can for the most part out-of-order
schedule around different codegen. Our benchmarking suggests that
hypothesis holds. When running on an in-order core this improved
performance by 3.8% geomean on a set of DSP workloads, 2% geomean on
some other embedded benchmark and between 1% and 1.8% on a set of
singlecore and multicore workloads, all running on a Cortex-A55 cluster.

On an out-of-order cpu the results are a lot more noisy but show flat
performance or an improvement. On the set of DSP and embedded
benchmarks, run on a Cortex-A78 there was a very noisy 1% speed
improvement. Using the most detailed results I could find, SPEC2006 runs
on a Neoverse N1 show a small increase in instruction count (+0.127%),
but a decrease in cycle counts (-0.155%, on average). The instruction
count is very low noise, the cycle count is more noisy with a 0.15%
decrease not being significant. SPEC2k17 shows a small decrease (-0.2%)
in instruction count leading to a -0.296% decrease in cycle count. These
results are within noise margins but tend to show a small improvement in
general.

When specifying an Apple target, clang will set "-target-cpu apple-a7"
on the command line, so should not be affected by this change when
running from clang. This also doesn't enable more runtime unrolling like
-mcpu=cortex-a55 does, only changing the schedule used.

A lot of existing tests have updated. This is a summary of the important
differences:
 - Most changes are the same instructions in a different order.
 - Sometimes this leads to very minor inefficiencies, such as requiring
   an extra mov to move variables into r0/v0 for the return value of a test
   function.
 - misched-fusion.ll was no longer fusing the pairs of instructions it
   should, as per D110561. I've changed the schedule used in the test
   for now.
 - neon-mla-mls.ll now uses "mul; sub" as opposed to "neg; mla" due to
   the different latencies. This seems fine to me.
 - Some SVE tests do not always remove movprfx where they did before due
   to different register allocation giving different destructive forms.
 - The tests argument-blocks-array-of-struct.ll and arm64-windows-calls.ll
   produce two LDR where they previously produced an LDP due to
   store-pair-suppress kicking in.
 - arm64-ldp.ll and arm64-neon-copy.ll are missing pre/postinc on LPD.
 - Some tests such as arm64-neon-mul-div.ll and
   ragreedy-local-interval-cost.ll have more, less or just different
   spilling.
 - In aarch64_generated_funcs.ll.generated.expected one part of the
   function is no longer outlined. Interestingly if I switch this to use
   any other scheduled even less is outlined.

Some of these are expected to happen, such as differences in outlining
or register spilling. There will be places where these result in worse
codegen, places where they are better, with the SPEC instruction counts
suggesting it is not a decrease overall, on average.

Differential Revision: https://reviews.llvm.org/D110830
2021-10-09 15:58:31 +01:00

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=arm64-apple-ios -aarch64-redzone | FileCheck %s --check-prefixes=CHECK,CHECK64
; RUN: llc < %s -mtriple=arm64_32-apple-ios -aarch64-redzone | FileCheck %s --check-prefixes=CHECK,CHECK32
define i64* @store64(i64* %ptr, i64 %index, i64 %spacing) {
; CHECK-LABEL: store64:
; CHECK: ; %bb.0:
; CHECK-NEXT: str x2, [x0], #8
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i64, i64* %ptr, i64 1
store i64 %spacing, i64* %ptr, align 4
ret i64* %incdec.ptr
}
define i64* @store64idxpos256(i64* %ptr, i64 %index, i64 %spacing) {
; CHECK-LABEL: store64idxpos256:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov x8, x0
; CHECK-NEXT: add x0, x0, #256
; CHECK-NEXT: str x2, [x8]
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i64, i64* %ptr, i64 32
store i64 %spacing, i64* %ptr, align 4
ret i64* %incdec.ptr
}
define i64* @store64idxneg256(i64* %ptr, i64 %index, i64 %spacing) {
; CHECK-LABEL: store64idxneg256:
; CHECK: ; %bb.0:
; CHECK-NEXT: str x2, [x0], #-256
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i64, i64* %ptr, i64 -32
store i64 %spacing, i64* %ptr, align 4
ret i64* %incdec.ptr
}
define i32* @store32(i32* %ptr, i32 %index, i32 %spacing) {
; CHECK-LABEL: store32:
; CHECK: ; %bb.0:
; CHECK-NEXT: str w2, [x0], #4
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
store i32 %spacing, i32* %ptr, align 4
ret i32* %incdec.ptr
}
define i32* @store32idxpos256(i32* %ptr, i32 %index, i32 %spacing) {
; CHECK-LABEL: store32idxpos256:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov x8, x0
; CHECK-NEXT: add x0, x0, #256
; CHECK-NEXT: str w2, [x8]
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 64
store i32 %spacing, i32* %ptr, align 4
ret i32* %incdec.ptr
}
define i32* @store32idxneg256(i32* %ptr, i32 %index, i32 %spacing) {
; CHECK-LABEL: store32idxneg256:
; CHECK: ; %bb.0:
; CHECK-NEXT: str w2, [x0], #-256
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 -64
store i32 %spacing, i32* %ptr, align 4
ret i32* %incdec.ptr
}
define i16* @store16(i16* %ptr, i16 %index, i16 %spacing) {
; CHECK-LABEL: store16:
; CHECK: ; %bb.0:
; CHECK-NEXT: strh w2, [x0], #2
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 1
store i16 %spacing, i16* %ptr, align 4
ret i16* %incdec.ptr
}
define i16* @store16idxpos256(i16* %ptr, i16 %index, i16 %spacing) {
; CHECK-LABEL: store16idxpos256:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov x8, x0
; CHECK-NEXT: add x0, x0, #256
; CHECK-NEXT: strh w2, [x8]
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 128
store i16 %spacing, i16* %ptr, align 4
ret i16* %incdec.ptr
}
define i16* @store16idxneg256(i16* %ptr, i16 %index, i16 %spacing) {
; CHECK-LABEL: store16idxneg256:
; CHECK: ; %bb.0:
; CHECK-NEXT: strh w2, [x0], #-256
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 -128
store i16 %spacing, i16* %ptr, align 4
ret i16* %incdec.ptr
}
define i8* @store8(i8* %ptr, i8 %index, i8 %spacing) {
; CHECK-LABEL: store8:
; CHECK: ; %bb.0:
; CHECK-NEXT: strb w2, [x0], #1
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
store i8 %spacing, i8* %ptr, align 4
ret i8* %incdec.ptr
}
define i8* @store8idxpos256(i8* %ptr, i8 %index, i8 %spacing) {
; CHECK-LABEL: store8idxpos256:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov x8, x0
; CHECK-NEXT: add x0, x0, #256
; CHECK-NEXT: strb w2, [x8]
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 256
store i8 %spacing, i8* %ptr, align 4
ret i8* %incdec.ptr
}
define i8* @store8idxneg256(i8* %ptr, i8 %index, i8 %spacing) {
; CHECK-LABEL: store8idxneg256:
; CHECK: ; %bb.0:
; CHECK-NEXT: strb w2, [x0], #-256
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 -256
store i8 %spacing, i8* %ptr, align 4
ret i8* %incdec.ptr
}
define i32* @truncst64to32(i32* %ptr, i32 %index, i64 %spacing) {
; CHECK-LABEL: truncst64to32:
; CHECK: ; %bb.0:
; CHECK-NEXT: str w2, [x0], #4
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
%trunc = trunc i64 %spacing to i32
store i32 %trunc, i32* %ptr, align 4
ret i32* %incdec.ptr
}
define i16* @truncst64to16(i16* %ptr, i16 %index, i64 %spacing) {
; CHECK-LABEL: truncst64to16:
; CHECK: ; %bb.0:
; CHECK-NEXT: strh w2, [x0], #2
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 1
%trunc = trunc i64 %spacing to i16
store i16 %trunc, i16* %ptr, align 4
ret i16* %incdec.ptr
}
define i8* @truncst64to8(i8* %ptr, i8 %index, i64 %spacing) {
; CHECK-LABEL: truncst64to8:
; CHECK: ; %bb.0:
; CHECK-NEXT: strb w2, [x0], #1
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
%trunc = trunc i64 %spacing to i8
store i8 %trunc, i8* %ptr, align 4
ret i8* %incdec.ptr
}
define half* @storef16(half* %ptr, half %index, half %spacing) nounwind {
; CHECK-LABEL: storef16:
; CHECK: ; %bb.0:
; CHECK-NEXT: str h1, [x0], #2
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds half, half* %ptr, i64 1
store half %spacing, half* %ptr, align 2
ret half* %incdec.ptr
}
define float* @storef32(float* %ptr, float %index, float %spacing) {
; CHECK-LABEL: storef32:
; CHECK: ; %bb.0:
; CHECK-NEXT: str s1, [x0], #4
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds float, float* %ptr, i64 1
store float %spacing, float* %ptr, align 4
ret float* %incdec.ptr
}
define double* @storef64(double* %ptr, double %index, double %spacing) {
; CHECK-LABEL: storef64:
; CHECK: ; %bb.0:
; CHECK-NEXT: str d1, [x0], #8
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds double, double* %ptr, i64 1
store double %spacing, double* %ptr, align 4
ret double* %incdec.ptr
}
define double* @pref64(double* %ptr, double %spacing) {
; CHECK-LABEL: pref64:
; CHECK: ; %bb.0:
; CHECK-NEXT: str d0, [x0, #32]!
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds double, double* %ptr, i64 4
store double %spacing, double* %incdec.ptr, align 4
ret double *%incdec.ptr
}
define float* @pref32(float* %ptr, float %spacing) {
; CHECK-LABEL: pref32:
; CHECK: ; %bb.0:
; CHECK-NEXT: str s0, [x0, #12]!
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds float, float* %ptr, i64 3
store float %spacing, float* %incdec.ptr, align 4
ret float *%incdec.ptr
}
define half* @pref16(half* %ptr, half %spacing) nounwind {
; CHECK-LABEL: pref16:
; CHECK: ; %bb.0:
; CHECK-NEXT: str h0, [x0, #6]!
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds half, half* %ptr, i64 3
store half %spacing, half* %incdec.ptr, align 2
ret half *%incdec.ptr
}
define i64* @pre64(i64* %ptr, i64 %spacing) {
; CHECK-LABEL: pre64:
; CHECK: ; %bb.0:
; CHECK-NEXT: str x1, [x0, #16]!
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i64, i64* %ptr, i64 2
store i64 %spacing, i64* %incdec.ptr, align 4
ret i64 *%incdec.ptr
}
define i64* @pre64idxpos256(i64* %ptr, i64 %spacing) {
; CHECK-LABEL: pre64idxpos256:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov x8, x0
; CHECK-NEXT: add x0, x0, #256
; CHECK-NEXT: str x1, [x8, #256]
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i64, i64* %ptr, i64 32
store i64 %spacing, i64* %incdec.ptr, align 4
ret i64 *%incdec.ptr
}
define i64* @pre64idxneg256(i64* %ptr, i64 %spacing) {
; CHECK-LABEL: pre64idxneg256:
; CHECK: ; %bb.0:
; CHECK-NEXT: str x1, [x0, #-256]!
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i64, i64* %ptr, i64 -32
store i64 %spacing, i64* %incdec.ptr, align 4
ret i64 *%incdec.ptr
}
define i32* @pre32(i32* %ptr, i32 %spacing) {
; CHECK-LABEL: pre32:
; CHECK: ; %bb.0:
; CHECK-NEXT: str w1, [x0, #8]!
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 2
store i32 %spacing, i32* %incdec.ptr, align 4
ret i32 *%incdec.ptr
}
define i32* @pre32idxpos256(i32* %ptr, i32 %spacing) {
; CHECK-LABEL: pre32idxpos256:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov x8, x0
; CHECK-NEXT: add x0, x0, #256
; CHECK-NEXT: str w1, [x8, #256]
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 64
store i32 %spacing, i32* %incdec.ptr, align 4
ret i32 *%incdec.ptr
}
define i32* @pre32idxneg256(i32* %ptr, i32 %spacing) {
; CHECK-LABEL: pre32idxneg256:
; CHECK: ; %bb.0:
; CHECK-NEXT: str w1, [x0, #-256]!
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 -64
store i32 %spacing, i32* %incdec.ptr, align 4
ret i32 *%incdec.ptr
}
define i16* @pre16(i16* %ptr, i16 %spacing) {
; CHECK-LABEL: pre16:
; CHECK: ; %bb.0:
; CHECK-NEXT: strh w1, [x0, #4]!
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 2
store i16 %spacing, i16* %incdec.ptr, align 4
ret i16 *%incdec.ptr
}
define i16* @pre16idxpos256(i16* %ptr, i16 %spacing) {
; CHECK-LABEL: pre16idxpos256:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov x8, x0
; CHECK-NEXT: add x0, x0, #256
; CHECK-NEXT: strh w1, [x8, #256]
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 128
store i16 %spacing, i16* %incdec.ptr, align 4
ret i16 *%incdec.ptr
}
define i16* @pre16idxneg256(i16* %ptr, i16 %spacing) {
; CHECK-LABEL: pre16idxneg256:
; CHECK: ; %bb.0:
; CHECK-NEXT: strh w1, [x0, #-256]!
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 -128
store i16 %spacing, i16* %incdec.ptr, align 4
ret i16 *%incdec.ptr
}
define i8* @pre8(i8* %ptr, i8 %spacing) {
; CHECK-LABEL: pre8:
; CHECK: ; %bb.0:
; CHECK-NEXT: strb w1, [x0, #2]!
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 2
store i8 %spacing, i8* %incdec.ptr, align 4
ret i8 *%incdec.ptr
}
define i8* @pre8idxpos256(i8* %ptr, i8 %spacing) {
; CHECK-LABEL: pre8idxpos256:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov x8, x0
; CHECK-NEXT: add x0, x0, #256
; CHECK-NEXT: strb w1, [x8, #256]
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 256
store i8 %spacing, i8* %incdec.ptr, align 4
ret i8 *%incdec.ptr
}
define i8* @pre8idxneg256(i8* %ptr, i8 %spacing) {
; CHECK-LABEL: pre8idxneg256:
; CHECK: ; %bb.0:
; CHECK-NEXT: strb w1, [x0, #-256]!
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 -256
store i8 %spacing, i8* %incdec.ptr, align 4
ret i8 *%incdec.ptr
}
define i32* @pretrunc64to32(i32* %ptr, i64 %spacing) {
; CHECK-LABEL: pretrunc64to32:
; CHECK: ; %bb.0:
; CHECK-NEXT: str w1, [x0, #8]!
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i32, i32* %ptr, i64 2
%trunc = trunc i64 %spacing to i32
store i32 %trunc, i32* %incdec.ptr, align 4
ret i32 *%incdec.ptr
}
define i16* @pretrunc64to16(i16* %ptr, i64 %spacing) {
; CHECK-LABEL: pretrunc64to16:
; CHECK: ; %bb.0:
; CHECK-NEXT: strh w1, [x0, #4]!
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i16, i16* %ptr, i64 2
%trunc = trunc i64 %spacing to i16
store i16 %trunc, i16* %incdec.ptr, align 4
ret i16 *%incdec.ptr
}
define i8* @pretrunc64to8(i8* %ptr, i64 %spacing) {
; CHECK-LABEL: pretrunc64to8:
; CHECK: ; %bb.0:
; CHECK-NEXT: strb w1, [x0, #2]!
; CHECK-NEXT: ret
%incdec.ptr = getelementptr inbounds i8, i8* %ptr, i64 2
%trunc = trunc i64 %spacing to i8
store i8 %trunc, i8* %incdec.ptr, align 4
ret i8 *%incdec.ptr
}
;-----
; Pre-indexed loads
;-----
define double* @preidxf64(double* %src, double* %out) {
; CHECK-LABEL: preidxf64:
; CHECK: ; %bb.0:
; CHECK-NEXT: ldr d0, [x0, #8]!
; CHECK-NEXT: str d0, [x1]
; CHECK-NEXT: ret
%ptr = getelementptr inbounds double, double* %src, i64 1
%tmp = load double, double* %ptr, align 4
store double %tmp, double* %out, align 4
ret double* %ptr
}
define float* @preidxf32(float* %src, float* %out) {
; CHECK-LABEL: preidxf32:
; CHECK: ; %bb.0:
; CHECK-NEXT: ldr s0, [x0, #4]!
; CHECK-NEXT: str s0, [x1]
; CHECK-NEXT: ret
%ptr = getelementptr inbounds float, float* %src, i64 1
%tmp = load float, float* %ptr, align 4
store float %tmp, float* %out, align 4
ret float* %ptr
}
define half* @preidxf16(half* %src, half* %out) {
; CHECK-LABEL: preidxf16:
; CHECK: ; %bb.0:
; CHECK-NEXT: ldr h0, [x0, #2]!
; CHECK-NEXT: str h0, [x1]
; CHECK-NEXT: ret
%ptr = getelementptr inbounds half, half* %src, i64 1
%tmp = load half, half* %ptr, align 2
store half %tmp, half* %out, align 2
ret half* %ptr
}
define i64* @preidx64(i64* %src, i64* %out) {
; CHECK-LABEL: preidx64:
; CHECK: ; %bb.0:
; CHECK-NEXT: ldr x8, [x0, #8]!
; CHECK-NEXT: str x8, [x1]
; CHECK-NEXT: ret
%ptr = getelementptr inbounds i64, i64* %src, i64 1
%tmp = load i64, i64* %ptr, align 4
store i64 %tmp, i64* %out, align 4
ret i64* %ptr
}
define i32* @preidx32(i32* %src, i32* %out) {
; CHECK-LABEL: preidx32:
; CHECK: ; %bb.0:
; CHECK-NEXT: ldr w8, [x0, #4]!
; CHECK-NEXT: str w8, [x1]
; CHECK-NEXT: ret
%ptr = getelementptr inbounds i32, i32* %src, i64 1
%tmp = load i32, i32* %ptr, align 4
store i32 %tmp, i32* %out, align 4
ret i32* %ptr
}
define i16* @preidx16zext32(i16* %src, i32* %out) {
; CHECK-LABEL: preidx16zext32:
; CHECK: ; %bb.0:
; CHECK-NEXT: ldrh w8, [x0, #2]!
; CHECK-NEXT: str w8, [x1]
; CHECK-NEXT: ret
%ptr = getelementptr inbounds i16, i16* %src, i64 1
%tmp = load i16, i16* %ptr, align 4
%ext = zext i16 %tmp to i32
store i32 %ext, i32* %out, align 4
ret i16* %ptr
}
define i16* @preidx16zext64(i16* %src, i64* %out) {
; CHECK-LABEL: preidx16zext64:
; CHECK: ; %bb.0:
; CHECK-NEXT: ldrh w8, [x0, #2]!
; CHECK-NEXT: str x8, [x1]
; CHECK-NEXT: ret
%ptr = getelementptr inbounds i16, i16* %src, i64 1
%tmp = load i16, i16* %ptr, align 4
%ext = zext i16 %tmp to i64
store i64 %ext, i64* %out, align 4
ret i16* %ptr
}
define i8* @preidx8zext32(i8* %src, i32* %out) {
; CHECK-LABEL: preidx8zext32:
; CHECK: ; %bb.0:
; CHECK-NEXT: ldrb w8, [x0, #1]!
; CHECK-NEXT: str w8, [x1]
; CHECK-NEXT: ret
%ptr = getelementptr inbounds i8, i8* %src, i64 1
%tmp = load i8, i8* %ptr, align 4
%ext = zext i8 %tmp to i32
store i32 %ext, i32* %out, align 4
ret i8* %ptr
}
define i8* @preidx8zext64(i8* %src, i64* %out) {
; CHECK-LABEL: preidx8zext64:
; CHECK: ; %bb.0:
; CHECK-NEXT: ldrb w8, [x0, #1]!
; CHECK-NEXT: str x8, [x1]
; CHECK-NEXT: ret
%ptr = getelementptr inbounds i8, i8* %src, i64 1
%tmp = load i8, i8* %ptr, align 4
%ext = zext i8 %tmp to i64
store i64 %ext, i64* %out, align 4
ret i8* %ptr
}
define i32* @preidx32sext64(i32* %src, i64* %out) {
; CHECK-LABEL: preidx32sext64:
; CHECK: ; %bb.0:
; CHECK-NEXT: ldrsw x8, [x0, #4]!
; CHECK-NEXT: str x8, [x1]
; CHECK-NEXT: ret
%ptr = getelementptr inbounds i32, i32* %src, i64 1
%tmp = load i32, i32* %ptr, align 4
%ext = sext i32 %tmp to i64
store i64 %ext, i64* %out, align 8
ret i32* %ptr
}
define i16* @preidx16sext32(i16* %src, i32* %out) {
; CHECK-LABEL: preidx16sext32:
; CHECK: ; %bb.0:
; CHECK-NEXT: ldrsh w8, [x0, #2]!
; CHECK-NEXT: str w8, [x1]
; CHECK-NEXT: ret
%ptr = getelementptr inbounds i16, i16* %src, i64 1
%tmp = load i16, i16* %ptr, align 4
%ext = sext i16 %tmp to i32
store i32 %ext, i32* %out, align 4
ret i16* %ptr
}
define i16* @preidx16sext64(i16* %src, i64* %out) {
; CHECK-LABEL: preidx16sext64:
; CHECK: ; %bb.0:
; CHECK-NEXT: ldrsh x8, [x0, #2]!
; CHECK-NEXT: str x8, [x1]
; CHECK-NEXT: ret
%ptr = getelementptr inbounds i16, i16* %src, i64 1
%tmp = load i16, i16* %ptr, align 4
%ext = sext i16 %tmp to i64
store i64 %ext, i64* %out, align 4
ret i16* %ptr
}
define i8* @preidx8sext32(i8* %src, i32* %out) {
; CHECK-LABEL: preidx8sext32:
; CHECK: ; %bb.0:
; CHECK-NEXT: ldrsb w8, [x0, #1]!
; CHECK-NEXT: str w8, [x1]
; CHECK-NEXT: ret
%ptr = getelementptr inbounds i8, i8* %src, i64 1
%tmp = load i8, i8* %ptr, align 4
%ext = sext i8 %tmp to i32
store i32 %ext, i32* %out, align 4
ret i8* %ptr
}
define i8* @preidx8sext64(i8* %src, i64* %out) {
; CHECK-LABEL: preidx8sext64:
; CHECK: ; %bb.0:
; CHECK-NEXT: ldrsb x8, [x0, #1]!
; CHECK-NEXT: str x8, [x1]
; CHECK-NEXT: ret
%ptr = getelementptr inbounds i8, i8* %src, i64 1
%tmp = load i8, i8* %ptr, align 4
%ext = sext i8 %tmp to i64
store i64 %ext, i64* %out, align 4
ret i8* %ptr
}
; This test checks if illegal post-index is generated
define i64* @postidx_clobber(i64* %addr) nounwind noinline ssp {
; CHECK64-LABEL: postidx_clobber:
; CHECK64: ; %bb.0:
; CHECK64-NEXT: mov x8, x0
; CHECK64-NEXT: str x0, [x8], #8
; CHECK64-NEXT: mov x0, x8
; CHECK64-NEXT: ret
;
; CHECK32-LABEL: postidx_clobber:
; CHECK32: ; %bb.0:
; CHECK32-NEXT: mov x8, x0
; CHECK32-NEXT: add w0, w8, #8
; CHECK32-NEXT: str w8, [x8]
; CHECK32-NEXT: ret
; ret
%paddr = bitcast i64* %addr to i64**
store i64* %addr, i64** %paddr
%newaddr = getelementptr i64, i64* %addr, i32 1
ret i64* %newaddr
}
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