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clang-p2996/llvm/test/CodeGen/AArch64/arm64-ldp.ll
David Green adec922361 [AArch64] Make -mcpu=generic schedule for an in-order core 
We would like to start pushing -mcpu=generic towards enabling the set of
features that improves performance for some CPUs, without hurting any
others. A blend of the performance options hopefully beneficial to all
CPUs. The largest part of that is enabling in-order scheduling using the
Cortex-A55 schedule model. This is similar to the Arm backend change
from eecb353d0e which made -mcpu=generic perform in-order scheduling
using the cortex-a8 schedule model.

The idea is that in-order cpu's require the most help in instruction
scheduling, whereas out-of-order cpus can for the most part out-of-order
schedule around different codegen. Our benchmarking suggests that
hypothesis holds. When running on an in-order core this improved
performance by 3.8% geomean on a set of DSP workloads, 2% geomean on
some other embedded benchmark and between 1% and 1.8% on a set of
singlecore and multicore workloads, all running on a Cortex-A55 cluster.

On an out-of-order cpu the results are a lot more noisy but show flat
performance or an improvement. On the set of DSP and embedded
benchmarks, run on a Cortex-A78 there was a very noisy 1% speed
improvement. Using the most detailed results I could find, SPEC2006 runs
on a Neoverse N1 show a small increase in instruction count (+0.127%),
but a decrease in cycle counts (-0.155%, on average). The instruction
count is very low noise, the cycle count is more noisy with a 0.15%
decrease not being significant. SPEC2k17 shows a small decrease (-0.2%)
in instruction count leading to a -0.296% decrease in cycle count. These
results are within noise margins but tend to show a small improvement in
general.

When specifying an Apple target, clang will set "-target-cpu apple-a7"
on the command line, so should not be affected by this change when
running from clang. This also doesn't enable more runtime unrolling like
-mcpu=cortex-a55 does, only changing the schedule used.

A lot of existing tests have updated. This is a summary of the important
differences:
 - Most changes are the same instructions in a different order.
 - Sometimes this leads to very minor inefficiencies, such as requiring
   an extra mov to move variables into r0/v0 for the return value of a test
   function.
 - misched-fusion.ll was no longer fusing the pairs of instructions it
   should, as per D110561. I've changed the schedule used in the test
   for now.
 - neon-mla-mls.ll now uses "mul; sub" as opposed to "neg; mla" due to
   the different latencies. This seems fine to me.
 - Some SVE tests do not always remove movprfx where they did before due
   to different register allocation giving different destructive forms.
 - The tests argument-blocks-array-of-struct.ll and arm64-windows-calls.ll
   produce two LDR where they previously produced an LDP due to
   store-pair-suppress kicking in.
 - arm64-ldp.ll and arm64-neon-copy.ll are missing pre/postinc on LPD.
 - Some tests such as arm64-neon-mul-div.ll and
   ragreedy-local-interval-cost.ll have more, less or just different
   spilling.
 - In aarch64_generated_funcs.ll.generated.expected one part of the
   function is no longer outlined. Interestingly if I switch this to use
   any other scheduled even less is outlined.

Some of these are expected to happen, such as differences in outlining
or register spilling. There will be places where these result in worse
codegen, places where they are better, with the SPEC instruction counts
suggesting it is not a decrease overall, on average.

Differential Revision: https://reviews.llvm.org/D110830
2021-10-09 15:58:31 +01:00

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=arm64-eabi -verify-machineinstrs | FileCheck %s
define i32 @ldp_int(i32* %p) nounwind {
; CHECK-LABEL: ldp_int:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp w8, w9, [x0]
; CHECK-NEXT: add w0, w9, w8
; CHECK-NEXT: ret
%tmp = load i32, i32* %p, align 4
%add.ptr = getelementptr inbounds i32, i32* %p, i64 1
%tmp1 = load i32, i32* %add.ptr, align 4
%add = add nsw i32 %tmp1, %tmp
ret i32 %add
}
define i64 @ldp_sext_int(i32* %p) nounwind {
; CHECK-LABEL: ldp_sext_int:
; CHECK: // %bb.0:
; CHECK-NEXT: ldpsw x8, x9, [x0]
; CHECK-NEXT: add x0, x9, x8
; CHECK-NEXT: ret
%tmp = load i32, i32* %p, align 4
%add.ptr = getelementptr inbounds i32, i32* %p, i64 1
%tmp1 = load i32, i32* %add.ptr, align 4
%sexttmp = sext i32 %tmp to i64
%sexttmp1 = sext i32 %tmp1 to i64
%add = add nsw i64 %sexttmp1, %sexttmp
ret i64 %add
}
define i64 @ldp_half_sext_res0_int(i32* %p) nounwind {
; CHECK-LABEL: ldp_half_sext_res0_int:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp w8, w9, [x0]
; CHECK-NEXT: // kill: def $w8 killed $w8 def $x8
; CHECK-NEXT: sxtw x8, w8
; CHECK-NEXT: add x0, x9, x8
; CHECK-NEXT: ret
%tmp = load i32, i32* %p, align 4
%add.ptr = getelementptr inbounds i32, i32* %p, i64 1
%tmp1 = load i32, i32* %add.ptr, align 4
%sexttmp = sext i32 %tmp to i64
%sexttmp1 = zext i32 %tmp1 to i64
%add = add nsw i64 %sexttmp1, %sexttmp
ret i64 %add
}
define i64 @ldp_half_sext_res1_int(i32* %p) nounwind {
; CHECK-LABEL: ldp_half_sext_res1_int:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp w8, w9, [x0]
; CHECK-NEXT: // kill: def $w9 killed $w9 def $x9
; CHECK-NEXT: sxtw x9, w9
; CHECK-NEXT: add x0, x9, x8
; CHECK-NEXT: ret
%tmp = load i32, i32* %p, align 4
%add.ptr = getelementptr inbounds i32, i32* %p, i64 1
%tmp1 = load i32, i32* %add.ptr, align 4
%sexttmp = zext i32 %tmp to i64
%sexttmp1 = sext i32 %tmp1 to i64
%add = add nsw i64 %sexttmp1, %sexttmp
ret i64 %add
}
define i64 @ldp_long(i64* %p) nounwind {
; CHECK-LABEL: ldp_long:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp x8, x9, [x0]
; CHECK-NEXT: add x0, x9, x8
; CHECK-NEXT: ret
%tmp = load i64, i64* %p, align 8
%add.ptr = getelementptr inbounds i64, i64* %p, i64 1
%tmp1 = load i64, i64* %add.ptr, align 8
%add = add nsw i64 %tmp1, %tmp
ret i64 %add
}
define float @ldp_float(float* %p) nounwind {
; CHECK-LABEL: ldp_float:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp s0, s1, [x0]
; CHECK-NEXT: fadd s0, s0, s1
; CHECK-NEXT: ret
%tmp = load float, float* %p, align 4
%add.ptr = getelementptr inbounds float, float* %p, i64 1
%tmp1 = load float, float* %add.ptr, align 4
%add = fadd float %tmp, %tmp1
ret float %add
}
define double @ldp_double(double* %p) nounwind {
; CHECK-LABEL: ldp_double:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp d0, d1, [x0]
; CHECK-NEXT: fadd d0, d0, d1
; CHECK-NEXT: ret
%tmp = load double, double* %p, align 8
%add.ptr = getelementptr inbounds double, double* %p, i64 1
%tmp1 = load double, double* %add.ptr, align 8
%add = fadd double %tmp, %tmp1
ret double %add
}
define <2 x double> @ldp_doublex2(<2 x double>* %p) nounwind {
; CHECK-LABEL: ldp_doublex2:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q0, q1, [x0]
; CHECK-NEXT: fadd v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
%tmp = load <2 x double>, <2 x double>* %p, align 16
%add.ptr = getelementptr inbounds <2 x double>, <2 x double>* %p, i64 1
%tmp1 = load <2 x double>, <2 x double>* %add.ptr, align 16
%add = fadd <2 x double> %tmp, %tmp1
ret <2 x double> %add
}
; Test the load/store optimizer---combine ldurs into a ldp, if appropriate
define i32 @ldur_int(i32* %a) nounwind {
; CHECK-LABEL: ldur_int:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp w9, w8, [x0, #-8]
; CHECK-NEXT: add w0, w8, w9
; CHECK-NEXT: ret
%p1 = getelementptr inbounds i32, i32* %a, i32 -1
%tmp1 = load i32, i32* %p1, align 2
%p2 = getelementptr inbounds i32, i32* %a, i32 -2
%tmp2 = load i32, i32* %p2, align 2
%tmp3 = add i32 %tmp1, %tmp2
ret i32 %tmp3
}
define i64 @ldur_sext_int(i32* %a) nounwind {
; CHECK-LABEL: ldur_sext_int:
; CHECK: // %bb.0:
; CHECK-NEXT: ldpsw x9, x8, [x0, #-8]
; CHECK-NEXT: add x0, x8, x9
; CHECK-NEXT: ret
%p1 = getelementptr inbounds i32, i32* %a, i32 -1
%tmp1 = load i32, i32* %p1, align 2
%p2 = getelementptr inbounds i32, i32* %a, i32 -2
%tmp2 = load i32, i32* %p2, align 2
%sexttmp1 = sext i32 %tmp1 to i64
%sexttmp2 = sext i32 %tmp2 to i64
%tmp3 = add i64 %sexttmp1, %sexttmp2
ret i64 %tmp3
}
define i64 @ldur_half_sext_int_res0(i32* %a) nounwind {
; CHECK-LABEL: ldur_half_sext_int_res0:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp w9, w8, [x0, #-8]
; CHECK-NEXT: // kill: def $w9 killed $w9 def $x9
; CHECK-NEXT: sxtw x9, w9
; CHECK-NEXT: add x0, x8, x9
; CHECK-NEXT: ret
%p1 = getelementptr inbounds i32, i32* %a, i32 -1
%tmp1 = load i32, i32* %p1, align 2
%p2 = getelementptr inbounds i32, i32* %a, i32 -2
%tmp2 = load i32, i32* %p2, align 2
%sexttmp1 = zext i32 %tmp1 to i64
%sexttmp2 = sext i32 %tmp2 to i64
%tmp3 = add i64 %sexttmp1, %sexttmp2
ret i64 %tmp3
}
define i64 @ldur_half_sext_int_res1(i32* %a) nounwind {
; CHECK-LABEL: ldur_half_sext_int_res1:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp w9, w8, [x0, #-8]
; CHECK-NEXT: // kill: def $w8 killed $w8 def $x8
; CHECK-NEXT: sxtw x8, w8
; CHECK-NEXT: add x0, x8, x9
; CHECK-NEXT: ret
%p1 = getelementptr inbounds i32, i32* %a, i32 -1
%tmp1 = load i32, i32* %p1, align 2
%p2 = getelementptr inbounds i32, i32* %a, i32 -2
%tmp2 = load i32, i32* %p2, align 2
%sexttmp1 = sext i32 %tmp1 to i64
%sexttmp2 = zext i32 %tmp2 to i64
%tmp3 = add i64 %sexttmp1, %sexttmp2
ret i64 %tmp3
}
define i64 @ldur_long(i64* %a) nounwind ssp {
; CHECK-LABEL: ldur_long:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp x9, x8, [x0, #-16]
; CHECK-NEXT: add x0, x8, x9
; CHECK-NEXT: ret
%p1 = getelementptr inbounds i64, i64* %a, i64 -1
%tmp1 = load i64, i64* %p1, align 2
%p2 = getelementptr inbounds i64, i64* %a, i64 -2
%tmp2 = load i64, i64* %p2, align 2
%tmp3 = add i64 %tmp1, %tmp2
ret i64 %tmp3
}
define float @ldur_float(float* %a) {
; CHECK-LABEL: ldur_float:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp s1, s0, [x0, #-8]
; CHECK-NEXT: fadd s0, s0, s1
; CHECK-NEXT: ret
%p1 = getelementptr inbounds float, float* %a, i64 -1
%tmp1 = load float, float* %p1, align 2
%p2 = getelementptr inbounds float, float* %a, i64 -2
%tmp2 = load float, float* %p2, align 2
%tmp3 = fadd float %tmp1, %tmp2
ret float %tmp3
}
define double @ldur_double(double* %a) {
; CHECK-LABEL: ldur_double:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp d1, d0, [x0, #-16]
; CHECK-NEXT: fadd d0, d0, d1
; CHECK-NEXT: ret
%p1 = getelementptr inbounds double, double* %a, i64 -1
%tmp1 = load double, double* %p1, align 2
%p2 = getelementptr inbounds double, double* %a, i64 -2
%tmp2 = load double, double* %p2, align 2
%tmp3 = fadd double %tmp1, %tmp2
ret double %tmp3
}
define <2 x double> @ldur_doublex2(<2 x double>* %a) {
; CHECK-LABEL: ldur_doublex2:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q1, q0, [x0, #-32]
; CHECK-NEXT: fadd v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
%p1 = getelementptr inbounds <2 x double>, <2 x double>* %a, i64 -1
%tmp1 = load <2 x double>, <2 x double>* %p1, align 2
%p2 = getelementptr inbounds <2 x double>, <2 x double>* %a, i64 -2
%tmp2 = load <2 x double>, <2 x double>* %p2, align 2
%tmp3 = fadd <2 x double> %tmp1, %tmp2
ret <2 x double> %tmp3
}
; Now check some boundary conditions
define i64 @pairUpBarelyIn(i64* %a) nounwind ssp {
; CHECK-LABEL: pairUpBarelyIn:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp x9, x8, [x0, #-256]
; CHECK-NEXT: add x0, x8, x9
; CHECK-NEXT: ret
%p1 = getelementptr inbounds i64, i64* %a, i64 -31
%tmp1 = load i64, i64* %p1, align 2
%p2 = getelementptr inbounds i64, i64* %a, i64 -32
%tmp2 = load i64, i64* %p2, align 2
%tmp3 = add i64 %tmp1, %tmp2
ret i64 %tmp3
}
define i64 @pairUpBarelyInSext(i32* %a) nounwind ssp {
; CHECK-LABEL: pairUpBarelyInSext:
; CHECK: // %bb.0:
; CHECK-NEXT: ldpsw x9, x8, [x0, #-256]
; CHECK-NEXT: add x0, x8, x9
; CHECK-NEXT: ret
%p1 = getelementptr inbounds i32, i32* %a, i64 -63
%tmp1 = load i32, i32* %p1, align 2
%p2 = getelementptr inbounds i32, i32* %a, i64 -64
%tmp2 = load i32, i32* %p2, align 2
%sexttmp1 = sext i32 %tmp1 to i64
%sexttmp2 = sext i32 %tmp2 to i64
%tmp3 = add i64 %sexttmp1, %sexttmp2
ret i64 %tmp3
}
define i64 @pairUpBarelyInHalfSextRes0(i32* %a) nounwind ssp {
; CHECK-LABEL: pairUpBarelyInHalfSextRes0:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp w9, w8, [x0, #-256]
; CHECK-NEXT: // kill: def $w9 killed $w9 def $x9
; CHECK-NEXT: sxtw x9, w9
; CHECK-NEXT: add x0, x8, x9
; CHECK-NEXT: ret
%p1 = getelementptr inbounds i32, i32* %a, i64 -63
%tmp1 = load i32, i32* %p1, align 2
%p2 = getelementptr inbounds i32, i32* %a, i64 -64
%tmp2 = load i32, i32* %p2, align 2
%sexttmp1 = zext i32 %tmp1 to i64
%sexttmp2 = sext i32 %tmp2 to i64
%tmp3 = add i64 %sexttmp1, %sexttmp2
ret i64 %tmp3
}
define i64 @pairUpBarelyInHalfSextRes1(i32* %a) nounwind ssp {
; CHECK-LABEL: pairUpBarelyInHalfSextRes1:
; CHECK: // %bb.0:
; CHECK-NEXT: ldp w9, w8, [x0, #-256]
; CHECK-NEXT: // kill: def $w8 killed $w8 def $x8
; CHECK-NEXT: sxtw x8, w8
; CHECK-NEXT: add x0, x8, x9
; CHECK-NEXT: ret
%p1 = getelementptr inbounds i32, i32* %a, i64 -63
%tmp1 = load i32, i32* %p1, align 2
%p2 = getelementptr inbounds i32, i32* %a, i64 -64
%tmp2 = load i32, i32* %p2, align 2
%sexttmp1 = sext i32 %tmp1 to i64
%sexttmp2 = zext i32 %tmp2 to i64
%tmp3 = add i64 %sexttmp1, %sexttmp2
ret i64 %tmp3
}
define i64 @pairUpBarelyOut(i64* %a) nounwind ssp {
; Don't be fragile about which loads or manipulations of the base register
; are used---just check that there isn't an ldp before the add
; CHECK-LABEL: pairUpBarelyOut:
; CHECK: // %bb.0:
; CHECK-NEXT: sub x8, x0, #264
; CHECK-NEXT: ldur x9, [x0, #-256]
; CHECK-NEXT: ldr x8, [x8]
; CHECK-NEXT: add x0, x9, x8
; CHECK-NEXT: ret
%p1 = getelementptr inbounds i64, i64* %a, i64 -32
%tmp1 = load i64, i64* %p1, align 2
%p2 = getelementptr inbounds i64, i64* %a, i64 -33
%tmp2 = load i64, i64* %p2, align 2
%tmp3 = add i64 %tmp1, %tmp2
ret i64 %tmp3
}
define i64 @pairUpBarelyOutSext(i32* %a) nounwind ssp {
; Don't be fragile about which loads or manipulations of the base register
; are used---just check that there isn't an ldp before the add
; CHECK-LABEL: pairUpBarelyOutSext:
; CHECK: // %bb.0:
; CHECK-NEXT: sub x8, x0, #260
; CHECK-NEXT: ldursw x9, [x0, #-256]
; CHECK-NEXT: ldrsw x8, [x8]
; CHECK-NEXT: add x0, x9, x8
; CHECK-NEXT: ret
%p1 = getelementptr inbounds i32, i32* %a, i64 -64
%tmp1 = load i32, i32* %p1, align 2
%p2 = getelementptr inbounds i32, i32* %a, i64 -65
%tmp2 = load i32, i32* %p2, align 2
%sexttmp1 = sext i32 %tmp1 to i64
%sexttmp2 = sext i32 %tmp2 to i64
%tmp3 = add i64 %sexttmp1, %sexttmp2
ret i64 %tmp3
}
define i64 @pairUpNotAligned(i64* %a) nounwind ssp {
; CHECK-LABEL: pairUpNotAligned:
; CHECK: // %bb.0:
; CHECK-NEXT: ldur x8, [x0, #-143]
; CHECK-NEXT: ldur x9, [x0, #-135]
; CHECK-NEXT: add x0, x8, x9
; CHECK-NEXT: ret
%p1 = getelementptr inbounds i64, i64* %a, i64 -18
%bp1 = bitcast i64* %p1 to i8*
%bp1p1 = getelementptr inbounds i8, i8* %bp1, i64 1
%dp1 = bitcast i8* %bp1p1 to i64*
%tmp1 = load i64, i64* %dp1, align 1
%p2 = getelementptr inbounds i64, i64* %a, i64 -17
%bp2 = bitcast i64* %p2 to i8*
%bp2p1 = getelementptr inbounds i8, i8* %bp2, i64 1
%dp2 = bitcast i8* %bp2p1 to i64*
%tmp2 = load i64, i64* %dp2, align 1
%tmp3 = add i64 %tmp1, %tmp2
ret i64 %tmp3
}
define i64 @pairUpNotAlignedSext(i32* %a) nounwind ssp {
; CHECK-LABEL: pairUpNotAlignedSext:
; CHECK: // %bb.0:
; CHECK-NEXT: ldursw x8, [x0, #-71]
; CHECK-NEXT: ldursw x9, [x0, #-67]
; CHECK-NEXT: add x0, x8, x9
; CHECK-NEXT: ret
%p1 = getelementptr inbounds i32, i32* %a, i64 -18
%bp1 = bitcast i32* %p1 to i8*
%bp1p1 = getelementptr inbounds i8, i8* %bp1, i64 1
%dp1 = bitcast i8* %bp1p1 to i32*
%tmp1 = load i32, i32* %dp1, align 1
%p2 = getelementptr inbounds i32, i32* %a, i64 -17
%bp2 = bitcast i32* %p2 to i8*
%bp2p1 = getelementptr inbounds i8, i8* %bp2, i64 1
%dp2 = bitcast i8* %bp2p1 to i32*
%tmp2 = load i32, i32* %dp2, align 1
%sexttmp1 = sext i32 %tmp1 to i64
%sexttmp2 = sext i32 %tmp2 to i64
%tmp3 = add i64 %sexttmp1, %sexttmp2
ret i64 %tmp3
}
declare void @use-ptr(i32*)
define i64 @ldp_sext_int_pre(i32* %p) nounwind {
; CHECK-LABEL: ldp_sext_int_pre:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: mov x19, x0
; CHECK-NEXT: add x0, x0, #8
; CHECK-NEXT: bl "use-ptr"
; CHECK-NEXT: ldpsw x8, x9, [x19, #8]
; CHECK-NEXT: add x0, x9, x8
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: ret
%ptr = getelementptr inbounds i32, i32* %p, i64 2
call void @use-ptr(i32* %ptr)
%add.ptr = getelementptr inbounds i32, i32* %ptr, i64 0
%tmp = load i32, i32* %add.ptr, align 4
%add.ptr1 = getelementptr inbounds i32, i32* %ptr, i64 1
%tmp1 = load i32, i32* %add.ptr1, align 4
%sexttmp = sext i32 %tmp to i64
%sexttmp1 = sext i32 %tmp1 to i64
%add = add nsw i64 %sexttmp1, %sexttmp
ret i64 %add
}
define i64 @ldp_sext_int_post(i32* %p) nounwind {
; CHECK-LABEL: ldp_sext_int_post:
; CHECK: // %bb.0:
; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
; CHECK-NEXT: add x8, x0, #8
; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: ldpsw x19, x20, [x0]
; CHECK-NEXT: mov x0, x8
; CHECK-NEXT: bl "use-ptr"
; CHECK-NEXT: add x0, x20, x19
; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
; CHECK-NEXT: ret
%tmp = load i32, i32* %p, align 4
%add.ptr = getelementptr inbounds i32, i32* %p, i64 1
%tmp1 = load i32, i32* %add.ptr, align 4
%sexttmp = sext i32 %tmp to i64
%sexttmp1 = sext i32 %tmp1 to i64
%ptr = getelementptr inbounds i32, i32* %add.ptr, i64 1
call void @use-ptr(i32* %ptr)
%add = add nsw i64 %sexttmp1, %sexttmp
ret i64 %add
}
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