d84b320dfd
This is the example:
int foo(int a, int b, int c, int d) {
return a + b + c + d;
}
And this is the Dependency Graph:
+------+ +------+ +------+ +------+
| A | | B | | C | | D |
+--+--++ +---+--+ +--+---+ +--+---+
^ ^ ^ ^ ^ ^
| | | | | |
| | | |New1 +--------------+
| | | | |
| | | | +--+---+
| |New2 | +-------+ ADD1 |
| | | +--+---+
| | | Fuse ^
| | +-------------+
| +------------+
| |
| Fuse +--+---+
+----------->+ ADD2 |
| +------+
+--+---+
| ADD3 |
+------+
We need also create an artificial edge from ADD1 to A if
https://reviews.llvm.org/D69998 is landed. That will force the Node A scheduled
before the ADD1 and ADD2. But in fact, it is ok to schedule the Node A
in-between ADD3 and ADD2, as ADD3 and ADD2 are NOT a fusion pair because
ADD2 has been matched to ADD1. We are creating these unnecessary dependency
edges that override the heuristics.
Differential Revision: https://reviews.llvm.org/D70066
21 lines
857 B
LLVM
21 lines
857 B
LLVM
; REQUIRES: asserts
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; RUN: llc < %s -mtriple=aarch64-linux-gnu -mattr=+fuse-arith-logic -verify-misched -debug-only=machine-scheduler 2>&1 > /dev/null | FileCheck %s
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; Verify that, the macro-fusion creates the necessary dependencies between SUs and
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; only 2 SU's are fused at most.
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define signext i32 @test(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d) {
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entry:
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; CHECK: ********** MI Scheduling **********
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; CHECK-LABEL: %bb.0 entry
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; CHECK: Macro fuse: SU([[SU4:[0-9]+]]) - SU([[SU5:[0-9]+]])
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; CHECK: Bind SU([[SU1:[0-9]+]]) - SU([[SU4]])
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; CHECK-NOT: Macro fuse:
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; CHECK: SU([[SU1]]): %{{[0-9]+}}:gpr32 = COPY $w2
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; CHECK: SU([[SU4]]): %{{[0-9]+}}:gpr32 = nsw ADDWrr
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; CHECK: SU([[SU5]]): %{{[0-9]+}}:gpr32 = nsw ADDWrr
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%add = add nsw i32 %b, %a
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%add1 = add nsw i32 %add, %c
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%sub = sub nsw i32 %add1, %d
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ret i32 %sub
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}
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