bdd55b2f18
Currently, the default alignment is much larger than the actual size of the vector in memory. Fix this to use a sane default. For SVE, temporarily remove lowering of load/store operations for predicates with less than 16 elements. The layout the backend was assuming for SVE predicates with less than 16 elements doesn't agree with the frontend. More work probably needs to be done here. This change is, strictly speaking, not backwards-compatible at the bitcode level. But probably nobody is actually depending on that; i1 vectors in memory are rare, and the code that does use them probably ends up forcing the alignment to something sane anyway. If we think this is a concern, I can restrict this to scalable vectors for now (where it's actually causing issues for me at the moment). Differential Revision: https://reviews.llvm.org/D88994
428 lines
16 KiB
LLVM
428 lines
16 KiB
LLVM
; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve -mattr=+bf16 < %s | FileCheck %s
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; This file checks that unpredicated load/store instructions to locals
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; use the right instructions and offsets.
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; Data fills
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define void @fill_nxv16i8() {
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; CHECK-LABEL: fill_nxv16i8
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; CHECK-DAG: ld1b { z{{[01]}}.b }, p0/z, [sp]
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; CHECK-DAG: ld1b { z{{[01]}}.b }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 16 x i8>
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%local1 = alloca <vscale x 16 x i8>
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load volatile <vscale x 16 x i8>, <vscale x 16 x i8>* %local0
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load volatile <vscale x 16 x i8>, <vscale x 16 x i8>* %local1
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ret void
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}
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define void @fill_nxv8i8() {
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; CHECK-LABEL: fill_nxv8i8
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; CHECK-DAG: ld1b { z{{[01]}}.h }, p0/z, [sp]
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; CHECK-DAG: ld1b { z{{[01]}}.h }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 8 x i8>
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%local1 = alloca <vscale x 8 x i8>
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load volatile <vscale x 8 x i8>, <vscale x 8 x i8>* %local0
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load volatile <vscale x 8 x i8>, <vscale x 8 x i8>* %local1
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ret void
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}
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define <vscale x 8 x i16> @fill_signed_nxv8i8() {
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; CHECK-LABEL: fill_signed_nxv8i8
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; CHECK-DAG: ld1sb { z{{[01]}}.h }, p0/z, [sp]
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; CHECK-DAG: ld1sb { z{{[01]}}.h }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 8 x i8>
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%local1 = alloca <vscale x 8 x i8>
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%a = load volatile <vscale x 8 x i8>, <vscale x 8 x i8>* %local0
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%a_ext = sext <vscale x 8 x i8> %a to <vscale x 8 x i16>
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%b = load volatile <vscale x 8 x i8>, <vscale x 8 x i8>* %local1
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%b_ext = sext <vscale x 8 x i8> %b to <vscale x 8 x i16>
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%sum = add <vscale x 8 x i16> %a_ext, %b_ext
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ret <vscale x 8 x i16> %sum
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}
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define void @fill_nxv4i8() {
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; CHECK-LABEL: fill_nxv4i8
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; CHECK-DAG: ld1b { z{{[01]}}.s }, p0/z, [sp, #3, mul vl]
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; CHECK-DAG: ld1b { z{{[01]}}.s }, p0/z, [sp, #2, mul vl]
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%local0 = alloca <vscale x 4 x i8>
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%local1 = alloca <vscale x 4 x i8>
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load volatile <vscale x 4 x i8>, <vscale x 4 x i8>* %local0
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load volatile <vscale x 4 x i8>, <vscale x 4 x i8>* %local1
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ret void
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}
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define <vscale x 4 x i32> @fill_signed_nxv4i8() {
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; CHECK-LABEL: fill_signed_nxv4i8
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; CHECK-DAG: ld1sb { z{{[01]}}.s }, p0/z, [sp, #3, mul vl]
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; CHECK-DAG: ld1sb { z{{[01]}}.s }, p0/z, [sp, #2, mul vl]
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%local0 = alloca <vscale x 4 x i8>
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%local1 = alloca <vscale x 4 x i8>
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%a = load volatile <vscale x 4 x i8>, <vscale x 4 x i8>* %local0
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%a_ext = sext <vscale x 4 x i8> %a to <vscale x 4 x i32>
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%b = load volatile <vscale x 4 x i8>, <vscale x 4 x i8>* %local1
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%b_ext = sext <vscale x 4 x i8> %b to <vscale x 4 x i32>
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%sum = add <vscale x 4 x i32> %a_ext, %b_ext
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ret <vscale x 4 x i32> %sum
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}
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define void @fill_nxv2i8() {
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; CHECK-LABEL: fill_nxv2i8
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; CHECK-DAG: ld1b { z{{[01]}}.d }, p0/z, [sp, #7, mul vl]
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; CHECK-DAG: ld1b { z{{[01]}}.d }, p0/z, [sp, #6, mul vl]
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%local0 = alloca <vscale x 2 x i8>
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%local1 = alloca <vscale x 2 x i8>
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load volatile <vscale x 2 x i8>, <vscale x 2 x i8>* %local0
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load volatile <vscale x 2 x i8>, <vscale x 2 x i8>* %local1
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ret void
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}
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define <vscale x 2 x i64> @fill_signed_nxv2i8() {
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; CHECK-LABEL: fill_signed_nxv2i8
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; CHECK-DAG: ld1sb { z{{[01]}}.d }, p0/z, [sp, #7, mul vl]
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; CHECK-DAG: ld1sb { z{{[01]}}.d }, p0/z, [sp, #6, mul vl]
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%local0 = alloca <vscale x 2 x i8>
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%local1 = alloca <vscale x 2 x i8>
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%a = load volatile <vscale x 2 x i8>, <vscale x 2 x i8>* %local0
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%a_ext = sext <vscale x 2 x i8> %a to <vscale x 2 x i64>
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%b = load volatile <vscale x 2 x i8>, <vscale x 2 x i8>* %local1
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%b_ext = sext <vscale x 2 x i8> %b to <vscale x 2 x i64>
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%sum = add <vscale x 2 x i64> %a_ext, %b_ext
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ret <vscale x 2 x i64> %sum
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}
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define void @fill_nxv8i16() {
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; CHECK-LABEL: fill_nxv8i16
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; CHECK-DAG: ld1h { z{{[01]}}.h }, p0/z, [sp]
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; CHECK-DAG: ld1h { z{{[01]}}.h }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 8 x i16>
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%local1 = alloca <vscale x 8 x i16>
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load volatile <vscale x 8 x i16>, <vscale x 8 x i16>* %local0
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load volatile <vscale x 8 x i16>, <vscale x 8 x i16>* %local1
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ret void
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}
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define void @fill_nxv4i16() {
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; CHECK-LABEL: fill_nxv4i16
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; CHECK-DAG: ld1h { z{{[01]}}.s }, p0/z, [sp]
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; CHECK-DAG: ld1h { z{{[01]}}.s }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 4 x i16>
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%local1 = alloca <vscale x 4 x i16>
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load volatile <vscale x 4 x i16>, <vscale x 4 x i16>* %local0
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load volatile <vscale x 4 x i16>, <vscale x 4 x i16>* %local1
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ret void
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}
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define <vscale x 4 x i32> @fill_signed_nxv4i16() {
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; CHECK-LABEL: fill_signed_nxv4i16
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; CHECK-DAG: ld1sh { z{{[01]}}.s }, p0/z, [sp]
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; CHECK-DAG: ld1sh { z{{[01]}}.s }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 4 x i16>
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%local1 = alloca <vscale x 4 x i16>
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%a = load volatile <vscale x 4 x i16>, <vscale x 4 x i16>* %local0
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%a_ext = sext <vscale x 4 x i16> %a to <vscale x 4 x i32>
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%b = load volatile <vscale x 4 x i16>, <vscale x 4 x i16>* %local1
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%b_ext = sext <vscale x 4 x i16> %b to <vscale x 4 x i32>
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%sum = add <vscale x 4 x i32> %a_ext, %b_ext
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ret <vscale x 4 x i32> %sum
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}
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define void @fill_nxv2i16() {
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; CHECK-LABEL: fill_nxv2i16
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; CHECK-DAG: ld1h { z{{[01]}}.d }, p0/z, [sp, #3, mul vl]
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; CHECK-DAG: ld1h { z{{[01]}}.d }, p0/z, [sp, #2, mul vl]
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%local0 = alloca <vscale x 2 x i16>
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%local1 = alloca <vscale x 2 x i16>
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load volatile <vscale x 2 x i16>, <vscale x 2 x i16>* %local0
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load volatile <vscale x 2 x i16>, <vscale x 2 x i16>* %local1
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ret void
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}
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define <vscale x 2 x i64> @fill_signed_nxv2i16() {
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; CHECK-LABEL: fill_signed_nxv2i16
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; CHECK-DAG: ld1sh { z{{[01]}}.d }, p0/z, [sp, #3, mul vl]
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; CHECK-DAG: ld1sh { z{{[01]}}.d }, p0/z, [sp, #2, mul vl]
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%local0 = alloca <vscale x 2 x i16>
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%local1 = alloca <vscale x 2 x i16>
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%a = load volatile <vscale x 2 x i16>, <vscale x 2 x i16>* %local0
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%a_ext = sext <vscale x 2 x i16> %a to <vscale x 2 x i64>
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%b = load volatile <vscale x 2 x i16>, <vscale x 2 x i16>* %local1
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%b_ext = sext <vscale x 2 x i16> %b to <vscale x 2 x i64>
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%sum = add <vscale x 2 x i64> %a_ext, %b_ext
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ret <vscale x 2 x i64> %sum
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}
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define void @fill_nxv4i32() {
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; CHECK-LABEL: fill_nxv4i32
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; CHECK-DAG: ld1w { z{{[01]}}.s }, p0/z, [sp]
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; CHECK-DAG: ld1w { z{{[01]}}.s }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 4 x i32>
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%local1 = alloca <vscale x 4 x i32>
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load volatile <vscale x 4 x i32>, <vscale x 4 x i32>* %local0
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load volatile <vscale x 4 x i32>, <vscale x 4 x i32>* %local1
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ret void
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}
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define void @fill_nxv2i32() {
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; CHECK-LABEL: fill_nxv2i32
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; CHECK-DAG: ld1w { z{{[01]}}.d }, p0/z, [sp]
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; CHECK-DAG: ld1w { z{{[01]}}.d }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 2 x i32>
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%local1 = alloca <vscale x 2 x i32>
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load volatile <vscale x 2 x i32>, <vscale x 2 x i32>* %local0
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load volatile <vscale x 2 x i32>, <vscale x 2 x i32>* %local1
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ret void
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}
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define <vscale x 2 x i64> @fill_signed_nxv2i32() {
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; CHECK-LABEL: fill_signed_nxv2i32
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; CHECK-DAG: ld1sw { z{{[01]}}.d }, p0/z, [sp]
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; CHECK-DAG: ld1sw { z{{[01]}}.d }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 2 x i32>
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%local1 = alloca <vscale x 2 x i32>
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%a = load volatile <vscale x 2 x i32>, <vscale x 2 x i32>* %local0
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%a_ext = sext <vscale x 2 x i32> %a to <vscale x 2 x i64>
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%b = load volatile <vscale x 2 x i32>, <vscale x 2 x i32>* %local1
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%b_ext = sext <vscale x 2 x i32> %b to <vscale x 2 x i64>
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%sum = add <vscale x 2 x i64> %a_ext, %b_ext
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ret <vscale x 2 x i64> %sum
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}
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define void @fill_nxv2i64() {
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; CHECK-LABEL: fill_nxv2i64
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; CHECK-DAG: ld1d { z{{[01]}}.d }, p0/z, [sp]
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; CHECK-DAG: ld1d { z{{[01]}}.d }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 2 x i64>
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%local1 = alloca <vscale x 2 x i64>
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load volatile <vscale x 2 x i64>, <vscale x 2 x i64>* %local0
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load volatile <vscale x 2 x i64>, <vscale x 2 x i64>* %local1
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ret void
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}
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define void @fill_nxv8bf16() {
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; CHECK-LABEL: fill_nxv8bf16
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; CHECK-DAG: ld1h { z{{[01]}}.h }, p0/z, [sp]
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; CHECK-DAG: ld1h { z{{[01]}}.h }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 8 x bfloat>
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%local1 = alloca <vscale x 8 x bfloat>
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load volatile <vscale x 8 x bfloat>, <vscale x 8 x bfloat>* %local0
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load volatile <vscale x 8 x bfloat>, <vscale x 8 x bfloat>* %local1
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ret void
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}
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define void @fill_nxv8f16() {
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; CHECK-LABEL: fill_nxv8f16
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; CHECK-DAG: ld1h { z{{[01]}}.h }, p0/z, [sp]
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; CHECK-DAG: ld1h { z{{[01]}}.h }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 8 x half>
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%local1 = alloca <vscale x 8 x half>
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load volatile <vscale x 8 x half>, <vscale x 8 x half>* %local0
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load volatile <vscale x 8 x half>, <vscale x 8 x half>* %local1
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ret void
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}
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define void @fill_nxv4f32() {
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; CHECK-LABEL: fill_nxv4f32
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; CHECK-DAG: ld1w { z{{[01]}}.s }, p0/z, [sp]
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; CHECK-DAG: ld1w { z{{[01]}}.s }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 4 x float>
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%local1 = alloca <vscale x 4 x float>
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load volatile <vscale x 4 x float>, <vscale x 4 x float>* %local0
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load volatile <vscale x 4 x float>, <vscale x 4 x float>* %local1
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ret void
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}
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define void @fill_nxv2f64() {
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; CHECK-LABEL: fill_nxv2f64
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; CHECK-DAG: ld1d { z{{[01]}}.d }, p0/z, [sp]
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; CHECK-DAG: ld1d { z{{[01]}}.d }, p0/z, [sp, #1, mul vl]
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%local0 = alloca <vscale x 2 x double>
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%local1 = alloca <vscale x 2 x double>
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load volatile <vscale x 2 x double>, <vscale x 2 x double>* %local0
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load volatile <vscale x 2 x double>, <vscale x 2 x double>* %local1
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ret void
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}
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; Data spills
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define void @spill_nxv16i8(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1) {
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; CHECK-LABEL: spill_nxv16i8
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; CHECK-DAG: st1b { z{{[01]}}.b }, p0, [sp]
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; CHECK-DAG: st1b { z{{[01]}}.b }, p0, [sp, #1, mul vl]
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%local0 = alloca <vscale x 16 x i8>
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%local1 = alloca <vscale x 16 x i8>
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store volatile <vscale x 16 x i8> %v0, <vscale x 16 x i8>* %local0
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store volatile <vscale x 16 x i8> %v1, <vscale x 16 x i8>* %local1
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ret void
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}
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define void @spill_nxv8i8(<vscale x 8 x i8> %v0, <vscale x 8 x i8> %v1) {
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; CHECK-LABEL: spill_nxv8i8
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; CHECK-DAG: st1b { z{{[01]}}.h }, p0, [sp]
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; CHECK-DAG: st1b { z{{[01]}}.h }, p0, [sp, #1, mul vl]
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%local0 = alloca <vscale x 8 x i8>
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%local1 = alloca <vscale x 8 x i8>
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store volatile <vscale x 8 x i8> %v0, <vscale x 8 x i8>* %local0
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store volatile <vscale x 8 x i8> %v1, <vscale x 8 x i8>* %local1
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ret void
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}
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define void @spill_nxv4i8(<vscale x 4 x i8> %v0, <vscale x 4 x i8> %v1) {
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; CHECK-LABEL: spill_nxv4i8
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; CHECK-DAG: st1b { z{{[01]}}.s }, p0, [sp, #3, mul vl]
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; CHECK-DAG: st1b { z{{[01]}}.s }, p0, [sp, #2, mul vl]
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%local0 = alloca <vscale x 4 x i8>
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%local1 = alloca <vscale x 4 x i8>
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store volatile <vscale x 4 x i8> %v0, <vscale x 4 x i8>* %local0
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store volatile <vscale x 4 x i8> %v1, <vscale x 4 x i8>* %local1
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ret void
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}
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define void @spill_nxv2i8(<vscale x 2 x i8> %v0, <vscale x 2 x i8> %v1) {
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; CHECK-LABEL: spill_nxv2i8
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; CHECK-DAG: st1b { z{{[01]}}.d }, p0, [sp, #7, mul vl]
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; CHECK-DAG: st1b { z{{[01]}}.d }, p0, [sp, #6, mul vl]
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%local0 = alloca <vscale x 2 x i8>
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%local1 = alloca <vscale x 2 x i8>
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store volatile <vscale x 2 x i8> %v0, <vscale x 2 x i8>* %local0
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store volatile <vscale x 2 x i8> %v1, <vscale x 2 x i8>* %local1
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ret void
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}
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define void @spill_nxv8i16(<vscale x 8 x i16> %v0, <vscale x 8 x i16> %v1) {
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; CHECK-LABEL: spill_nxv8i16
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; CHECK-DAG: st1h { z{{[01]}}.h }, p0, [sp]
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; CHECK-DAG: st1h { z{{[01]}}.h }, p0, [sp, #1, mul vl]
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%local0 = alloca <vscale x 8 x i16>
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%local1 = alloca <vscale x 8 x i16>
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store volatile <vscale x 8 x i16> %v0, <vscale x 8 x i16>* %local0
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store volatile <vscale x 8 x i16> %v1, <vscale x 8 x i16>* %local1
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ret void
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}
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define void @spill_nxv4i16(<vscale x 4 x i16> %v0, <vscale x 4 x i16> %v1) {
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; CHECK-LABEL: spill_nxv4i16
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; CHECK-DAG: st1h { z{{[01]}}.s }, p0, [sp]
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; CHECK-DAG: st1h { z{{[01]}}.s }, p0, [sp, #1, mul vl]
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%local0 = alloca <vscale x 4 x i16>
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%local1 = alloca <vscale x 4 x i16>
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store volatile <vscale x 4 x i16> %v0, <vscale x 4 x i16>* %local0
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store volatile <vscale x 4 x i16> %v1, <vscale x 4 x i16>* %local1
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ret void
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}
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define void @spill_nxv2i16(<vscale x 2 x i16> %v0, <vscale x 2 x i16> %v1) {
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; CHECK-LABEL: spill_nxv2i16
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; CHECK-DAG: st1h { z{{[01]}}.d }, p0, [sp, #3, mul vl]
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; CHECK-DAG: st1h { z{{[01]}}.d }, p0, [sp, #2, mul vl]
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%local0 = alloca <vscale x 2 x i16>
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%local1 = alloca <vscale x 2 x i16>
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store volatile <vscale x 2 x i16> %v0, <vscale x 2 x i16>* %local0
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store volatile <vscale x 2 x i16> %v1, <vscale x 2 x i16>* %local1
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ret void
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}
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define void @spill_nxv4i32(<vscale x 4 x i32> %v0, <vscale x 4 x i32> %v1) {
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; CHECK-LABEL: spill_nxv4i32
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; CHECK-DAG: st1w { z{{[01]}}.s }, p0, [sp]
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; CHECK-DAG: st1w { z{{[01]}}.s }, p0, [sp, #1, mul vl]
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%local0 = alloca <vscale x 4 x i32>
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%local1 = alloca <vscale x 4 x i32>
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store volatile <vscale x 4 x i32> %v0, <vscale x 4 x i32>* %local0
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store volatile <vscale x 4 x i32> %v1, <vscale x 4 x i32>* %local1
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ret void
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}
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define void @spill_nxv2i32(<vscale x 2 x i32> %v0, <vscale x 2 x i32> %v1) {
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; CHECK-LABEL: spill_nxv2i32
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; CHECK-DAG: st1w { z{{[01]}}.d }, p0, [sp]
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; CHECK-DAG: st1w { z{{[01]}}.d }, p0, [sp, #1, mul vl]
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%local0 = alloca <vscale x 2 x i32>
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%local1 = alloca <vscale x 2 x i32>
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store volatile <vscale x 2 x i32> %v0, <vscale x 2 x i32>* %local0
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store volatile <vscale x 2 x i32> %v1, <vscale x 2 x i32>* %local1
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ret void
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}
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define void @spill_nxv2i64(<vscale x 2 x i64> %v0, <vscale x 2 x i64> %v1) {
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; CHECK-LABEL: spill_nxv2i64
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; CHECK-DAG: st1d { z{{[01]}}.d }, p0, [sp]
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; CHECK-DAG: st1d { z{{[01]}}.d }, p0, [sp, #1, mul vl]
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%local0 = alloca <vscale x 2 x i64>
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%local1 = alloca <vscale x 2 x i64>
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store volatile <vscale x 2 x i64> %v0, <vscale x 2 x i64>* %local0
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store volatile <vscale x 2 x i64> %v1, <vscale x 2 x i64>* %local1
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ret void
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}
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define void @spill_nxv8f16(<vscale x 8 x half> %v0, <vscale x 8 x half> %v1) {
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; CHECK-LABEL: spill_nxv8f16
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; CHECK-DAG: st1h { z{{[01]}}.h }, p0, [sp]
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; CHECK-DAG: st1h { z{{[01]}}.h }, p0, [sp, #1, mul vl]
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%local0 = alloca <vscale x 8 x half>
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%local1 = alloca <vscale x 8 x half>
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store volatile <vscale x 8 x half> %v0, <vscale x 8 x half>* %local0
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store volatile <vscale x 8 x half> %v1, <vscale x 8 x half>* %local1
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|
ret void
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|
}
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|
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define void @spill_nxv8bf16(<vscale x 8 x bfloat> %v0, <vscale x 8 x bfloat> %v1) {
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; CHECK-LABEL: spill_nxv8bf16
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|
; CHECK-DAG: st1h { z{{[01]}}.h }, p0, [sp]
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; CHECK-DAG: st1h { z{{[01]}}.h }, p0, [sp, #1, mul vl]
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%local0 = alloca <vscale x 8 x bfloat>
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|
%local1 = alloca <vscale x 8 x bfloat>
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|
store volatile <vscale x 8 x bfloat> %v0, <vscale x 8 x bfloat>* %local0
|
|
store volatile <vscale x 8 x bfloat> %v1, <vscale x 8 x bfloat>* %local1
|
|
ret void
|
|
}
|
|
|
|
define void @spill_nxv4f32(<vscale x 4 x float> %v0, <vscale x 4 x float> %v1) {
|
|
; CHECK-LABEL: spill_nxv4f32
|
|
; CHECK-DAG: st1w { z{{[01]}}.s }, p0, [sp]
|
|
; CHECK-DAG: st1w { z{{[01]}}.s }, p0, [sp, #1, mul vl]
|
|
%local0 = alloca <vscale x 4 x float>
|
|
%local1 = alloca <vscale x 4 x float>
|
|
store volatile <vscale x 4 x float> %v0, <vscale x 4 x float>* %local0
|
|
store volatile <vscale x 4 x float> %v1, <vscale x 4 x float>* %local1
|
|
ret void
|
|
}
|
|
|
|
define void @spill_nxv2f64(<vscale x 2 x double> %v0, <vscale x 2 x double> %v1) {
|
|
; CHECK-LABEL: spill_nxv2f64
|
|
; CHECK-DAG: st1d { z{{[01]}}.d }, p0, [sp]
|
|
; CHECK-DAG: st1d { z{{[01]}}.d }, p0, [sp, #1, mul vl]
|
|
%local0 = alloca <vscale x 2 x double>
|
|
%local1 = alloca <vscale x 2 x double>
|
|
store volatile <vscale x 2 x double> %v0, <vscale x 2 x double>* %local0
|
|
store volatile <vscale x 2 x double> %v1, <vscale x 2 x double>* %local1
|
|
ret void
|
|
}
|
|
|
|
; Predicate fills
|
|
|
|
define void @fill_nxv16i1() {
|
|
; CHECK-LABEL: fill_nxv16i1
|
|
; CHECK-DAG: ldr p{{[01]}}, [sp, #7, mul vl]
|
|
; CHECK-DAG: ldr p{{[01]}}, [sp, #6, mul vl]
|
|
%local0 = alloca <vscale x 16 x i1>
|
|
%local1 = alloca <vscale x 16 x i1>
|
|
load volatile <vscale x 16 x i1>, <vscale x 16 x i1>* %local0
|
|
load volatile <vscale x 16 x i1>, <vscale x 16 x i1>* %local1
|
|
ret void
|
|
}
|
|
|
|
; Predicate spills
|
|
|
|
define void @spill_nxv16i1(<vscale x 16 x i1> %v0, <vscale x 16 x i1> %v1) {
|
|
; CHECK-LABEL: spill_nxv16i1
|
|
; CHECK-DAG: str p{{[01]}}, [sp, #7, mul vl]
|
|
; CHECK-DAG: str p{{[01]}}, [sp, #6, mul vl]
|
|
%local0 = alloca <vscale x 16 x i1>
|
|
%local1 = alloca <vscale x 16 x i1>
|
|
store volatile <vscale x 16 x i1> %v0, <vscale x 16 x i1>* %local0
|
|
store volatile <vscale x 16 x i1> %v1, <vscale x 16 x i1>* %local1
|
|
ret void
|
|
}
|