d77b43c385
This is the counterpart to G_AMDGPU_FFBH_U32 which already exists. These instructions have a defined result of -1 when the input is zero. Differential Revision: https://reviews.llvm.org/D107441
69 lines
1.6 KiB
YAML
69 lines
1.6 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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---
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name: ffbl_b32_s32_s_s
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: ffbl_b32_s32_s_s
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; CHECK: liveins: $sgpr0
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; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; CHECK: [[S_FF1_I32_B32_:%[0-9]+]]:sreg_32 = S_FF1_I32_B32 [[COPY]]
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; CHECK: S_ENDPGM 0, implicit [[S_FF1_I32_B32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_AMDGPU_FFBL_B32 %0
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S_ENDPGM 0, implicit %1
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...
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---
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name: ffbl_b32_s32_v_v
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: ffbl_b32_s32_v_v
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; CHECK: liveins: $vgpr0
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; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; CHECK: [[V_FFBL_B32_e64_:%[0-9]+]]:vgpr_32 = V_FFBL_B32_e64 [[COPY]], implicit $exec
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; CHECK: S_ENDPGM 0, implicit [[V_FFBL_B32_e64_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = G_AMDGPU_FFBL_B32 %0
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S_ENDPGM 0, implicit %1
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...
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---
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name: ffbl_b32_v_s
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: ffbl_b32_v_s
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; CHECK: liveins: $sgpr0
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; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; CHECK: [[V_FFBL_B32_e64_:%[0-9]+]]:vgpr_32 = V_FFBL_B32_e64 [[COPY]], implicit $exec
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; CHECK: S_ENDPGM 0, implicit [[V_FFBL_B32_e64_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s32) = G_AMDGPU_FFBL_B32 %0
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S_ENDPGM 0, implicit %1
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...
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