da067ed569
Using a BufferSize of one for memory ProcResources will result in better ILP since it more accurately models the dependencies between memory ops and their consumers on an in-order processor. After this change, the scheduler will treat the data edges from loads as blocking so that stalls are guaranteed when waiting for data to be retreaved from memory. Since we don't actually track waitcnt here, this should do a better job at modeling their behavior. Practically, this means that the scheduler will trigger the 'STALL' heuristic more often. This type of change needs to be evaluated experimentally. Preliminary results are positive. Fixes: SWDEV-282962 Reviewed By: rampitec Differential Revision: https://reviews.llvm.org/D114777
35 lines
1.3 KiB
LLVM
35 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=bonaire -verify-machineinstrs < %s | FileCheck %s
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; TODO: Replace with existing DAG tests
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@lds_512_4 = internal unnamed_addr addrspace(3) global [128 x i32] undef, align 4
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@lds_4_8 = addrspace(3) global i32 undef, align 8
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define amdgpu_kernel void @use_lds_globals(i32 addrspace(1)* %out, i32 addrspace(3)* %in) #0 {
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; CHECK-LABEL: use_lds_globals:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; CHECK-NEXT: v_mov_b32_e32 v0, 4
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; CHECK-NEXT: s_mov_b32 m0, -1
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; CHECK-NEXT: ds_read_b32 v2, v0
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; CHECK-NEXT: v_mov_b32_e32 v3, 9
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; CHECK-NEXT: s_waitcnt lgkmcnt(0)
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; CHECK-NEXT: s_add_u32 s0, s0, 4
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; CHECK-NEXT: s_addc_u32 s1, s1, 0
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; CHECK-NEXT: v_mov_b32_e32 v0, s0
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; CHECK-NEXT: v_mov_b32_e32 v1, s1
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; CHECK-NEXT: flat_store_dword v[0:1], v2
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; CHECK-NEXT: v_mov_b32_e32 v0, 0x200
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; CHECK-NEXT: ds_write_b32 v0, v3
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; CHECK-NEXT: s_endpgm
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entry:
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%tmp0 = getelementptr [128 x i32], [128 x i32] addrspace(3)* @lds_512_4, i32 0, i32 1
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%tmp1 = load i32, i32 addrspace(3)* %tmp0
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%tmp2 = getelementptr i32, i32 addrspace(1)* %out, i32 1
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store i32 %tmp1, i32 addrspace(1)* %tmp2
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store i32 9, i32 addrspace(3)* @lds_4_8
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ret void
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}
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attributes #0 = { nounwind }
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