3f7b7e7393
The FixSGPRCopies pass converts instructions to VALU when removing illegal VGPR to SGPR copies. Instructions that use SCC are changed to use VCC instead. When that happens, the pass must also change instructions that define SCC to define VCC. The pass was not changing the SCC definition when an ADDC is converted due to a input that is a VGPR to SGPR copy. But, the initial ADD insruction, which define SCC, is not converted. This causes a compilation failure due to a use of an undefined physical register. This patch adds code that inserts the SCC definition in the MoveToVALU worklist when a SCC use is converted to a VCC use. Differential Revision: https://reviews.llvm.org/D102111
75 lines
3.7 KiB
YAML
75 lines
3.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=gfx1030 -run-pass=si-fix-sgpr-copies -verify-machineinstrs -o - %s | FileCheck --check-prefix=GCN %s
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# Test that the Fix SGPR Copy pass changes scc definitions to vcc if the
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# instruction that uses the scc is changed to use vcc.
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---
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name: change_scc_def
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body: |
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bb.0:
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; GCN-LABEL: name: change_scc_def
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; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 681
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; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[DEF2:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[DEF3:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 1
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; GCN: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 0
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; GCN: [[V_MUL_HI_U32_U24_e64_:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_U24_e64 [[S_MOV_B32_1]], [[S_MOV_B32_]], implicit $exec
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed [[DEF1]]
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; GCN: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 killed [[DEF]], [[COPY]], implicit-def $vcc_lo, implicit $exec
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; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY killed [[DEF3]]
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; GCN: [[V_ADDC_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADDC_U32_e32 killed [[DEF2]], [[COPY1]], implicit-def $vcc_lo, implicit $vcc_lo, implicit $exec
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; GCN: [[DEF4:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_2]]
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; GCN: [[V_ADDC_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADDC_U32_e32 [[V_MUL_HI_U32_U24_e64_]], [[COPY2]], implicit-def $vcc_lo, implicit $vcc_lo, implicit $exec
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%0:sreg_32 = S_MOV_B32 681
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%1:sreg_32 = IMPLICIT_DEF
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%2:sreg_32 = IMPLICIT_DEF
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%3:sreg_32 = IMPLICIT_DEF
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%4:sreg_32 = IMPLICIT_DEF
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%5:sreg_32 = S_MOV_B32 1
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%6:sreg_32 = S_MOV_B32 0
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%7:vgpr_32 = V_MUL_HI_U32_U24_e64 %5, %0, implicit $exec
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%8:sreg_32 = S_ADD_U32 killed %1, killed %2, implicit-def $scc
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%9:sreg_32 = S_ADDC_U32 killed %3, killed %4, implicit-def $scc, implicit $scc
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%10:sreg_32 = COPY %7
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%11:sreg_32 = S_ADDC_U32 killed %10, %6, implicit-def dead $scc, implicit $scc
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...
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# This case successfully converted scc definitions to vcc because the input
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# to the first add is a vgpr. This test checks that it still works correctly.
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---
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name: test-working-scc-def
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body: |
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bb.0:
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; GCN-LABEL: name: test-working-scc-def
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; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; GCN: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; GCN: [[DEF2:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[DEF3:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[DEF4:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[DEF5:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[DEF6:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 killed [[DEF2]], [[DEF]], implicit-def $vcc_lo, implicit $exec
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed [[DEF4]]
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; GCN: [[V_ADDC_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADDC_U32_e32 killed [[DEF3]], [[COPY]], implicit-def $vcc_lo, implicit $vcc_lo, implicit $exec
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; GCN: [[DEF7:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[DEF5]]
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; GCN: [[V_ADDC_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADDC_U32_e32 killed [[V_ADDC_U32_e32_1]], [[COPY1]], implicit-def $vcc_lo, implicit $vcc_lo, implicit $exec
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%0:vgpr_32 = IMPLICIT_DEF
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%1:vgpr_32 = IMPLICIT_DEF
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%2:sreg_32 = IMPLICIT_DEF
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%3:sreg_32 = IMPLICIT_DEF
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%4:sreg_32 = IMPLICIT_DEF
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%5:sreg_32 = IMPLICIT_DEF
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%6:sreg_32 = COPY %0
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%7:sreg_32 = S_ADD_U32 killed %6, killed %2, implicit-def $scc
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%8:sreg_32 = S_ADDC_U32 killed %3, killed %4, implicit-def $scc, implicit $scc
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%9:sreg_32 = COPY %1
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%10:sreg_32 = S_ADDC_U32 killed %10, %5, implicit-def dead $scc, implicit $scc
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...
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