686607676f
Instructions like WAVE_BARRIER and SI_MASKED_UNREACHABLE are only placeholders to prevent certain unwanted transformations and will get discarded during assembly emission. They should not be counted during nop insertion. Reviewed By: rampitec Differential Revision: https://reviews.llvm.org/D108022
46 lines
1.3 KiB
YAML
46 lines
1.3 KiB
YAML
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs -run-pass post-RA-sched %s -o - | FileCheck -check-prefix=GCN %s
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# WAVE_BARRIER and SI_MASKED_UNREACHABLE are not really instructions.
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# To fix the hazard (m0 def followed by V_INTERP), the scheduler
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# should move another instruction into the slot.
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---
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# CHECK-LABEL: name: hazard_wave_barrier
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# CHECK-LABEL: bb.0:
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# GCN: $m0 = S_MOV_B32 killed renamable $sgpr0
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# GCN-NEXT: WAVE_BARRIER
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# GCN-NEXT: S_MOV_B32 0
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# GCN-NEXT: V_INTERP_MOV_F32
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name: hazard_wave_barrier
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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$m0 = S_MOV_B32 killed renamable $sgpr0
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WAVE_BARRIER
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renamable $vgpr0 = V_INTERP_MOV_F32 2, 0, 0, implicit $mode, implicit $m0, implicit $exec
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renamable $sgpr1 = S_MOV_B32 0
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard-masked-unreachable
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# CHECK-LABEL: bb.0:
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# GCN: $m0 = S_MOV_B32 killed renamable $sgpr0
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# GCN-NEXT: SI_MASKED_UNREACHABLE
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# GCN-NEXT: S_MOV_B32 0
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# GCN-NEXT: V_INTERP_MOV_F32
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---
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name: hazard-masked-unreachable
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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$m0 = S_MOV_B32 killed renamable $sgpr0
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SI_MASKED_UNREACHABLE
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renamable $vgpr0 = V_INTERP_MOV_F32 2, 0, 0, implicit $mode, implicit $m0, implicit $exec
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renamable $sgpr1 = S_MOV_B32 0
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bb.1:
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S_ENDPGM 0
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...
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