3bffb1cd0e
Replace individual operands GLC, SLC, and DLC with a single cache_policy bitmask operand. This will reduce the number of operands in MIR and I hope the amount of code. These operands are mostly 0 anyway. Additional advantage that parser will accept these flags in any order unlike now. Differential Revision: https://reviews.llvm.org/D96469
43 lines
1.6 KiB
YAML
43 lines
1.6 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=post-RA-sched -verify-machineinstrs -o - %s | FileCheck %s
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# The scheduler was not inspecting the first instruction in the bundle
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# when adding kill flags, so it would incorrectly mark the first use
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# of $vgpr0 as killed.
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---
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name: kill_flag_use_first_bundle_inst
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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body: |
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bb.0:
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liveins: $sgpr4_sgpr5, $sgpr7
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; CHECK-LABEL: name: kill_flag_use_first_bundle_inst
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; CHECK: liveins: $sgpr4_sgpr5, $sgpr7
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; CHECK: renamable $sgpr0 = S_LOAD_DWORD_IMM killed renamable $sgpr4_sgpr5, 0, 0
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; CHECK: $m0 = S_MOV_B32 -1
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; CHECK: $vgpr0 = V_MOV_B32_e32 killed $sgpr0, implicit $exec, implicit $exec
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; CHECK: BUNDLE implicit $vgpr0, implicit $m0, implicit $exec {
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; CHECK: DS_GWS_INIT $vgpr0, 8, implicit $m0, implicit $exec
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; CHECK: S_WAITCNT 0
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; CHECK: }
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; CHECK: BUNDLE implicit killed $vgpr0, implicit $m0, implicit $exec {
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; CHECK: DS_GWS_BARRIER killed $vgpr0, 8, implicit $m0, implicit $exec
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; CHECK: S_WAITCNT 0
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; CHECK: }
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renamable $sgpr0 = S_LOAD_DWORD_IMM killed renamable $sgpr4_sgpr5, 0, 0
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$m0 = S_MOV_B32 -1
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$vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $exec
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BUNDLE implicit $vgpr0, implicit $m0, implicit $exec {
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DS_GWS_INIT $vgpr0, 8, implicit $m0, implicit $exec
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S_WAITCNT 0
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}
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BUNDLE implicit killed $vgpr0, implicit $m0, implicit $exec {
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DS_GWS_BARRIER $vgpr0, 8, implicit $m0, implicit $exec
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S_WAITCNT 0
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}
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...
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