8e64d84995
Sinking must check for interference between the block prologue and the instruction being sunk. Specifically check for clobbering of uses by the prologue, and overwrites to prologue defined registers by the sunk instruction. Reviewed By: rampitec, ruiling Differential Revision: https://reviews.llvm.org/D121277
214 lines
7.3 KiB
YAML
214 lines
7.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass=postra-machine-sink -mattr=-wavefrontsize32,+wavefrontsize64 -o - %s | FileCheck -check-prefixes=GFX10 %s
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# Ensure that PostRA Machine Sink does not sink instructions
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# past block prologues which would overwrite their uses.
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---
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# Make sure COPY to $sgpr9 is not sunk after S_AND_SAVEEXEC_B64.
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name: _amdgpu_ps_main
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alignment: 1
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tracksRegLiveness: true
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registers: []
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liveins:
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- { reg: '$sgpr4', virtual-reg: '' }
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body: |
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; GFX10-LABEL: name: _amdgpu_ps_main
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; GFX10: bb.0:
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; GFX10-NEXT: successors: %bb.1(0x80000000)
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; GFX10-NEXT: liveins: $sgpr4
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: renamable $sgpr9 = COPY $sgpr4
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; GFX10-NEXT: renamable $vgpr5 = IMPLICIT_DEF
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; GFX10-NEXT: renamable $sgpr0_sgpr1 = nofpexcept V_CMP_NGT_F32_e64 0, 0, 0, $vgpr5, 0, implicit $mode, implicit $exec
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; GFX10-NEXT: S_BRANCH %bb.1
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: bb.1:
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; GFX10-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
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; GFX10-NEXT: liveins: $sgpr6, $sgpr9, $sgpr0_sgpr1
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: $sgpr4_sgpr5 = S_AND_SAVEEXEC_B64 $sgpr0_sgpr1, implicit-def $exec, implicit-def $scc, implicit $exec
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; GFX10-NEXT: renamable $sgpr14_sgpr15 = S_XOR_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
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; GFX10-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec
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; GFX10-NEXT: S_BRANCH %bb.2
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: bb.2:
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; GFX10-NEXT: successors: %bb.3(0x80000000)
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; GFX10-NEXT: liveins: $sgpr6
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: $m0 = COPY killed renamable $sgpr6
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; GFX10-NEXT: S_BRANCH %bb.3
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: bb.3:
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; GFX10-NEXT: S_ENDPGM 0
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bb.0:
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successors: %bb.1(0x80000000)
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liveins: $sgpr4
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renamable $sgpr9 = COPY $sgpr4
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renamable $vgpr5 = IMPLICIT_DEF
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renamable $sgpr0_sgpr1 = nofpexcept V_CMP_NGT_F32_e64 0, 0, 0, $vgpr5, 0, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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successors: %bb.2(0x40000000), %bb.8(0x40000000)
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liveins: $sgpr6, $sgpr9, $sgpr0_sgpr1
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$sgpr4_sgpr5 = S_AND_SAVEEXEC_B64 $sgpr0_sgpr1, implicit-def $exec, implicit-def $scc, implicit $exec
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renamable $sgpr14_sgpr15 = S_XOR_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
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S_CBRANCH_EXECZ %bb.8, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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successors: %bb.8(0x40000000)
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liveins: $sgpr6
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$m0 = COPY killed renamable $sgpr6
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S_BRANCH %bb.8
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bb.8:
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S_ENDPGM 0
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...
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---
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# Make sure COPY to $sgpr0_sgpr1 is not sunk after S_AND_SAVEEXEC_B64.
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name: _amdgpu_ps_main2
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alignment: 1
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tracksRegLiveness: true
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registers: []
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liveins:
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- { reg: '$sgpr4', virtual-reg: '' }
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- { reg: '$sgpr6_sgpr7', virtual-reg: '' }
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body: |
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; GFX10-LABEL: name: _amdgpu_ps_main2
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; GFX10: bb.0:
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; GFX10-NEXT: successors: %bb.1(0x80000000)
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; GFX10-NEXT: liveins: $sgpr4, $sgpr6_sgpr7
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: renamable $sgpr9 = COPY $sgpr4
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; GFX10-NEXT: renamable $vgpr5 = IMPLICIT_DEF
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; GFX10-NEXT: renamable $sgpr0_sgpr1 = COPY $sgpr6_sgpr7
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; GFX10-NEXT: S_BRANCH %bb.1
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: bb.1:
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; GFX10-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
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; GFX10-NEXT: liveins: $sgpr6, $sgpr9, $sgpr0_sgpr1
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: $sgpr4_sgpr5 = S_AND_SAVEEXEC_B64 $sgpr0_sgpr1, implicit-def $exec, implicit-def $scc, implicit $exec
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; GFX10-NEXT: renamable $sgpr14_sgpr15 = S_XOR_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
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; GFX10-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec
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; GFX10-NEXT: S_BRANCH %bb.2
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: bb.2:
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; GFX10-NEXT: successors: %bb.3(0x80000000)
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; GFX10-NEXT: liveins: $sgpr6
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: $m0 = COPY killed renamable $sgpr6
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; GFX10-NEXT: S_BRANCH %bb.3
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: bb.3:
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; GFX10-NEXT: S_ENDPGM 0
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bb.0:
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successors: %bb.1(0x80000000)
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liveins: $sgpr4, $sgpr6_sgpr7
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renamable $sgpr9 = COPY $sgpr4
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renamable $vgpr5 = IMPLICIT_DEF
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renamable $sgpr0_sgpr1 = COPY $sgpr6_sgpr7
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S_BRANCH %bb.1
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bb.1:
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successors: %bb.2(0x40000000), %bb.8(0x40000000)
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liveins: $sgpr6, $sgpr9, $sgpr0_sgpr1
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$sgpr4_sgpr5 = S_AND_SAVEEXEC_B64 $sgpr0_sgpr1, implicit-def $exec, implicit-def $scc, implicit $exec
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renamable $sgpr14_sgpr15 = S_XOR_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
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S_CBRANCH_EXECZ %bb.8, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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successors: %bb.8(0x40000000)
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liveins: $sgpr6
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$m0 = COPY killed renamable $sgpr6
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S_BRANCH %bb.8
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bb.8:
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S_ENDPGM 0
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...
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---
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# Make sure COPY to $sgpr2_sgpr3 is not sunk after S_AND_SAVEEXEC_B32.
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name: _amdgpu_ps_main3
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alignment: 1
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tracksRegLiveness: true
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registers: []
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liveins:
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- { reg: '$sgpr6_sgpr7', virtual-reg: '' }
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- { reg: '$sgpr8', virtual-reg: '' }
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body: |
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; GFX10-LABEL: name: _amdgpu_ps_main3
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; GFX10: bb.0:
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; GFX10-NEXT: successors: %bb.1(0x80000000)
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; GFX10-NEXT: liveins: $sgpr6_sgpr7, $sgpr8
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: renamable $vgpr5 = IMPLICIT_DEF
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; GFX10-NEXT: renamable $sgpr0_sgpr1 = IMPLICIT_DEF
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; GFX10-NEXT: renamable $sgpr2_sgpr3 = COPY $sgpr6_sgpr7
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; GFX10-NEXT: S_BRANCH %bb.1
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: bb.1:
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; GFX10-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
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; GFX10-NEXT: liveins: $sgpr6, $sgpr8, $sgpr0_sgpr1, $sgpr2_sgpr3
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: $sgpr2 = S_AND_SAVEEXEC_B32 $sgpr8, implicit-def $exec, implicit-def $scc, implicit $exec
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; GFX10-NEXT: $sgpr4_sgpr5 = S_AND_SAVEEXEC_B64 $sgpr0_sgpr1, implicit-def $exec, implicit-def $scc, implicit $exec
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; GFX10-NEXT: renamable $sgpr14_sgpr15 = S_XOR_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
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; GFX10-NEXT: S_NOP 0, implicit $sgpr2_sgpr3
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; GFX10-NEXT: S_CBRANCH_EXECZ %bb.3, implicit $exec
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; GFX10-NEXT: S_BRANCH %bb.2
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: bb.2:
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; GFX10-NEXT: successors: %bb.3(0x80000000)
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; GFX10-NEXT: liveins: $sgpr6
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: $m0 = COPY killed renamable $sgpr6
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; GFX10-NEXT: S_BRANCH %bb.3
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: bb.3:
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; GFX10-NEXT: S_ENDPGM 0
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bb.0:
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successors: %bb.1(0x80000000)
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liveins: $sgpr6_sgpr7, $sgpr8
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renamable $vgpr5 = IMPLICIT_DEF
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renamable $sgpr0_sgpr1 = IMPLICIT_DEF
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renamable $sgpr2_sgpr3 = COPY $sgpr6_sgpr7
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S_BRANCH %bb.1
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bb.1:
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successors: %bb.2(0x40000000), %bb.8(0x40000000)
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liveins: $sgpr6, $sgpr8, $sgpr0_sgpr1, $sgpr2_sgpr3
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$sgpr2 = S_AND_SAVEEXEC_B32 $sgpr8, implicit-def $exec, implicit-def $scc, implicit $exec
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$sgpr4_sgpr5 = S_AND_SAVEEXEC_B64 $sgpr0_sgpr1, implicit-def $exec, implicit-def $scc, implicit $exec
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renamable $sgpr14_sgpr15 = S_XOR_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
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S_NOP 0, implicit $sgpr2_sgpr3
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S_CBRANCH_EXECZ %bb.8, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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successors: %bb.8(0x40000000)
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liveins: $sgpr6
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$m0 = COPY killed renamable $sgpr6
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S_BRANCH %bb.8
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bb.8:
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S_ENDPGM 0
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...
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