0fbb17458a
This patch intends to guard indirect branches performed by longjmp
by inserting BTI instructions after calls to setjmp.
Calls with 'returns-twice' are lowered to a new pseudo-instruction
named t2CALL_BTI that is later expanded to a bundle of {tBL,t2BTI}.
This patch is part of a series that adds support for the PACBTI-M extension of
the Armv8.1-M architecture, as detailed here:
https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension
The PACBTI-M specification can be found in the Armv8-M Architecture Reference
Manual:
https://developer.arm.com/documentation/ddi0553/latest
The following people contributed to this patch:
- Alexandros Lamprineas
- Ties Stuij
Reviewed By: labrinea
Differential Revision: https://reviews.llvm.org/D112427
93 lines
2.7 KiB
LLVM
93 lines
2.7 KiB
LLVM
; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -enable-machine-outliner < %s | \
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; RUN: FileCheck %s --check-prefix=BTI
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; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -enable-machine-outliner -mattr=+no-bti-at-return-twice < %s | FileCheck %s --check-prefix=NOBTI
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; C source
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; --------
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; jmp_buf buf;
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;
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; extern void h(int a, int b, int *c);
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;
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; int f(int a, int b, int c, int d) {
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; if (setjmp(buf) != 0)
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; return -1;
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; h(a, b, &a);
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; return 2 + a * (a + b) / (c + d);
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; }
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;
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; int g(int a, int b, int c, int d) {
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; if (setjmp(buf) != 0)
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; return -1;
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; h(a, b, &a);
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; return 1 + a * (a + b) / (c + d);
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; }
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@buf = global [20 x i64] zeroinitializer, align 8
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define i32 @f(i32 %a, i32 %b, i32 %c, i32 %d) {
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; BTI-LABEL: f:
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; BTI: bl OUTLINED_FUNCTION_0
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; BTI-NEXT: bti
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; NOBTI-LABEL: f:
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; NOBTI: bl OUTLINED_FUNCTION_0
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; NOBTI-NEXT: cbz r0, .LBB0_2
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entry:
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%a.addr = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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%call = call i32 @setjmp(i64* getelementptr inbounds ([20 x i64], [20 x i64]* @buf, i32 0, i32 0)) #0
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%cmp.not = icmp eq i32 %call, 0
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br i1 %cmp.not, label %if.end, label %return
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if.end: ; preds = %entry
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call void @h(i32 %a, i32 %b, i32* nonnull %a.addr)
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%0 = load i32, i32* %a.addr, align 4
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%add = add nsw i32 %0, %b
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%mul = mul nsw i32 %add, %0
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%add1 = add nsw i32 %d, %c
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%div = sdiv i32 %mul, %add1
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%add2 = add nsw i32 %div, 2
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br label %return
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return: ; preds = %entry, %if.end
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%retval.0 = phi i32 [ %add2, %if.end ], [ -1, %entry ]
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ret i32 %retval.0
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}
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define i32 @g(i32 %a, i32 %b, i32 %c, i32 %d) {
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; BTI-LABEL: g:
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; BTI: bl OUTLINED_FUNCTION_0
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; BTI-NEXT: bti
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; NOBTI-LABEL: g:
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; NOBTI: bl OUTLINED_FUNCTION_0
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; NOBTI-NEXT: cbz r0, .LBB1_2
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entry:
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%a.addr = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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%call = call i32 @setjmp(i64* getelementptr inbounds ([20 x i64], [20 x i64]* @buf, i32 0, i32 0)) #0
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%cmp.not = icmp eq i32 %call, 0
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br i1 %cmp.not, label %if.end, label %return
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if.end: ; preds = %entry
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call void @h(i32 %a, i32 %b, i32* nonnull %a.addr)
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%0 = load i32, i32* %a.addr, align 4
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%add = add nsw i32 %0, %b
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%mul = mul nsw i32 %add, %0
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%add1 = add nsw i32 %d, %c
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%div = sdiv i32 %mul, %add1
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%add2 = add nsw i32 %div, 1
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br label %return
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return: ; preds = %entry, %if.end
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%retval.0 = phi i32 [ %add2, %if.end ], [ -1, %entry ]
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ret i32 %retval.0
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}
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declare void @h(i32, i32, i32*)
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declare i32 @setjmp(i64*) #0
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attributes #0 = { returns_twice }
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!llvm.module.flags = !{!0}
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!0 = !{i32 1, !"branch-target-enforcement", i32 1}
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