a1c6743922
This patch constructs codegen infra and successfully generate the first 'add' instruction. Add integer calling convention for fixed arguments which are passed with general-purpose registers. New test added here: CodeGen/LoongArch/ir-instruction/add.ll The test file is placed in a subdirectory because we will use subdirctories to distinguish different categories of tests (e.g. intrinsic, inline-asm ...) Reviewed By: MaskRay, SixWeining Differential Revision: https://reviews.llvm.org/D122366
18 lines
515 B
LLVM
18 lines
515 B
LLVM
; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=CHECK32
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; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=CHECK64
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define i32 @addRR(i32 %x, i32 %y) {
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; CHECK32-LABEL: addRR:
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; CHECK32: # %bb.0: # %entry
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; CHECK32-NEXT: add.w $a0, $a1, $a0
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; CHECK32-NEXT: jirl $zero, $ra, 0
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;
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; CHECK64-LABEL: addRR:
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; CHECK64: # %bb.0: # %entry
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; CHECK64-NEXT: add.d $a0, $a1, $a0
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; CHECK64-NEXT: jirl $zero, $ra, 0
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entry:
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%add = add nsw i32 %y, %x
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ret i32 %add
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}
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