fae05692a3
This will currently accept the old number of bytes syntax, and convert it to a scalar. This should be removed in the near future (I think I converted all of the tests already, but likely missed a few). Not sure what the exact syntax and policy should be. We can continue printing the number of bytes for non-generic instructions to avoid test churn and only allow non-scalar types for generic instructions. This will currently print the LLT in parentheses, but accept parsing the existing integers and implicitly converting to scalar. The parentheses are a bit ugly, but the parser logic seems unable to deal without either parentheses or some keyword to indicate the start of a type.
30 lines
1.3 KiB
YAML
30 lines
1.3 KiB
YAML
# RUN: llc -march=amdgcn -run-pass=none -verify-machineinstrs -o - %s | FileCheck %s
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# RUN: llc -march=amdgcn -run-pass mir-canonicalizer -verify-machineinstrs -o - %s
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# RUN: llc -march=amdgcn -run-pass mir-canonicalizer -mir-vreg-namer-use-stable-hash -verify-machineinstrs -o - %s
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# Previously getReservedRegs was called before parsing
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# machineFunctionInfo, but the AMDGPU implementation depends on
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# setting register fields to reserve there. $sgpr50 would then not be
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# reserved, resulting in a verifier error from an undefined register.
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---
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# CHECK: machineFunctionInfo:
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# CHECK: isEntryFunction: true
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# CHECK: scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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# CHECK: frameOffsetReg: '$sgpr50'
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# CHECK: renamable $vgpr0 = BUFFER_LOAD_DWORD_OFFEN %stack.0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr50, 4, 0, 0, 0, implicit $exec :: (load (s32), addrspace 5)
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name: reserve_correct_register
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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frameOffsetReg: '$sgpr50'
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stack:
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- { id: 0, type: default, offset: 0, size: 4, alignment: 4 }
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body: |
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bb.0:
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renamable $vgpr0 = BUFFER_LOAD_DWORD_OFFEN %stack.0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr50, 4, 0, 0, 0, implicit $exec :: (load (s32), addrspace 5)
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S_ENDPGM 0
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...
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