d391e4fe84
Be more consistent in the naming convention for the various RET instructions to specify in terms of bitwidth. Helps prevent future scheduler model mismatches like those that were only addressed in D44687. Differential Revision: https://reviews.llvm.org/D113302
23 lines
468 B
YAML
23 lines
468 B
YAML
# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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--- |
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@"quoted name" = external global i32
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define i32 @test() {
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entry:
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%a = load i32, i32* @"quoted name"
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ret i32 %a
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}
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...
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---
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name: test
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body: |
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bb.0.entry:
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; CHECK: [[@LINE+1]]:48: end of machine instruction reached before the closing '"'
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$rax = MOV64rm $rip, 1, _, @"quoted name, _
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$eax = MOV32rm killed $rax, 1, _, 0, _
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RET64 $eax
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...
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