1f559353a7
Introduce IntImmLeaf version of PatLeaf immZExt16 for 32-bit immediates. Change immZExt16 with imm32ZExt16 for andi, ori and xori. This keeps same behavior for SDAG and allows for GlobalISel selectImpl to select 'G_CONSTANT imm' + G_AND, G_OR, G_XOR into ANDi, ORi, XORi, respectively, when 32-bit imm satisfies imm32ZExt16 predicate: zero extending 16 low bits of imm is equal to imm. Large number of test changes comes from zero extending of small types which is transformed into 'and' with bitmask in legalizer. Differential Revision:https://reviews.llvm.org/D70185
104 lines
2.7 KiB
YAML
104 lines
2.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
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--- |
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define i32 @Unconditional_branch(i32 %a, i32 %b) {
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entry:
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br label %block
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end: ; preds = %block
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ret i32 %a
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block: ; preds = %entry
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br label %end
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}
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define i32 @Conditional_branch(i1 %cond, i32 %a, i32 %b) {
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br i1 %cond, label %if.then, label %if.else
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if.then: ; preds = %0
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ret i32 %a
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if.else: ; preds = %0
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ret i32 %b
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}
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...
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---
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name: Unconditional_branch
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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; MIPS32-LABEL: name: Unconditional_branch
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; MIPS32: bb.0.entry:
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; MIPS32: successors: %bb.2(0x80000000)
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: J %bb.2, implicit-def $at
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; MIPS32: bb.1.end:
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; MIPS32: $v0 = COPY [[COPY]]
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; MIPS32: RetRA implicit $v0
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; MIPS32: bb.2.block:
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; MIPS32: successors: %bb.1(0x80000000)
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; MIPS32: J %bb.1, implicit-def $at
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bb.1.entry:
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liveins: $a0, $a1
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%0:gprb(s32) = COPY $a0
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G_BR %bb.3
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bb.2.end:
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$v0 = COPY %0(s32)
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RetRA implicit $v0
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bb.3.block:
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G_BR %bb.2
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...
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---
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name: Conditional_branch
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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; MIPS32-LABEL: name: Conditional_branch
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; MIPS32: bb.0 (%ir-block.0):
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; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; MIPS32: liveins: $a0, $a1, $a2
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
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; MIPS32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1
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; MIPS32: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
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; MIPS32: J %bb.2, implicit-def $at
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; MIPS32: bb.1.if.then:
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; MIPS32: $v0 = COPY [[COPY1]]
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; MIPS32: RetRA implicit $v0
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; MIPS32: bb.2.if.else:
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; MIPS32: $v0 = COPY [[COPY2]]
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; MIPS32: RetRA implicit $v0
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bb.1 (%ir-block.0):
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liveins: $a0, $a1, $a2
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%3:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%2:gprb(s32) = COPY $a2
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%5:gprb(s32) = G_CONSTANT i32 1
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%6:gprb(s32) = COPY %3(s32)
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%4:gprb(s32) = G_AND %6, %5
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G_BRCOND %4(s32), %bb.2
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G_BR %bb.3
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bb.2.if.then:
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$v0 = COPY %1(s32)
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RetRA implicit $v0
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bb.3.if.else:
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$v0 = COPY %2(s32)
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RetRA implicit $v0
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...
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