Files
clang-p2996/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/constants.mir
Guillaume Chatelet 48904e9452 [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
Summary:
This catches malformed mir files which specify alignment as log2 instead of pow2.
See https://reviews.llvm.org/D65945 for reference,

This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: MatzeB, qcolombet, dschuff, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, s.egerton, pzheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67433

llvm-svn: 371608
2019-09-11 11:16:48 +00:00

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2.0 KiB
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |
define void @_0xABCD0000() {entry: ret void}
define void @_0x00008000() {entry: ret void}
define void @_0xFFFFFFF6() {entry: ret void}
define void @_0x0A0B0C0D() {entry: ret void}
...
---
name: _0xABCD0000
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: _0xABCD0000
; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi 43981
; MIPS32: $v0 = COPY [[LUi]]
; MIPS32: RetRA implicit $v0
%0:gprb(s32) = G_CONSTANT i32 -1412628480
$v0 = COPY %0(s32)
RetRA implicit $v0
...
---
name: _0x00008000
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: _0x00008000
; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 32768
; MIPS32: $v0 = COPY [[ORi]]
; MIPS32: RetRA implicit $v0
%0:gprb(s32) = G_CONSTANT i32 32768
$v0 = COPY %0(s32)
RetRA implicit $v0
...
---
name: _0xFFFFFFF6
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: _0xFFFFFFF6
; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 65526
; MIPS32: $v0 = COPY [[ADDiu]]
; MIPS32: RetRA implicit $v0
%0:gprb(s32) = G_CONSTANT i32 -10
$v0 = COPY %0(s32)
RetRA implicit $v0
...
---
name: _0x0A0B0C0D
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: _0x0A0B0C0D
; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi 2571
; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 3085
; MIPS32: $v0 = COPY [[ORi]]
; MIPS32: RetRA implicit $v0
%0:gprb(s32) = G_CONSTANT i32 168496141
$v0 = COPY %0(s32)
RetRA implicit $v0
...