778932c673
The dst/dstt/dstst/dststt instructions are nop's on all PowerPC cores that AIX supports. The AIX assembler also does not accept these mnemonics. Turn them into nop's on AIX (similar to dstall).
49 lines
1.5 KiB
LLVM
49 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-- -mattr=+altivec | \
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; RUN: FileCheck %s
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-aix- \
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; RUN: -mattr=+altivec | FileCheck %s --check-prefix=AIX64
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-aix- -mattr=+altivec | \
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; RUN: FileCheck %s --check-prefix=AIX32
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define hidden void @_Z4borkPc(i8* %image) {
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; CHECK-LABEL: _Z4borkPc:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: li 4, 8
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; CHECK-NEXT: dst 3, 4, 0
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; CHECK-NEXT: dstt 3, 4, 0
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; CHECK-NEXT: dstst 3, 4, 0
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; CHECK-NEXT: dststt 3, 4, 0
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; CHECK-NEXT: blr
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;
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; AIX64-LABEL: _Z4borkPc:
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; AIX64: # %bb.0: # %entry
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; AIX64-NEXT: li 4, 8
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; AIX64-NEXT: nop
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; AIX64-NEXT: nop
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; AIX64-NEXT: nop
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; AIX64-NEXT: nop
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; AIX64-NEXT: blr
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;
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; AIX32-LABEL: _Z4borkPc:
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; AIX32: # %bb.0: # %entry
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; AIX32-NEXT: li 4, 8
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; AIX32-NEXT: nop
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; AIX32-NEXT: nop
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; AIX32-NEXT: nop
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; AIX32-NEXT: nop
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; AIX32-NEXT: blr
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entry:
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tail call void @llvm.ppc.altivec.dst( i8* %image, i32 8, i32 0 )
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tail call void @llvm.ppc.altivec.dstt( i8* %image, i32 8, i32 0 )
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tail call void @llvm.ppc.altivec.dstst( i8* %image, i32 8, i32 0 )
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tail call void @llvm.ppc.altivec.dststt( i8* %image, i32 8, i32 0 )
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ret void
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}
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declare void @llvm.ppc.altivec.dst(i8*, i32, i32)
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declare void @llvm.ppc.altivec.dstt(i8*, i32, i32)
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declare void @llvm.ppc.altivec.dstst(i8*, i32, i32)
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declare void @llvm.ppc.altivec.dststt(i8*, i32, i32)
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