99e00663d4
When depth > 0, callee frame address is used to compute the return address of callee producing improper return address. This patch adds the fix to use caller frame address to compute the return address of callee. Reviewed By: nemanjai, #powerpc Differential revision: https://reviews.llvm.org/D107646
36 lines
1.0 KiB
LLVM
36 lines
1.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck %s
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu -regalloc=basic | FileCheck %s
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declare i8* @llvm.frameaddress(i32) nounwind readnone
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define i8* @g2() nounwind readnone {
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; CHECK-LABEL: g2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lwz 3, 0(1)
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; CHECK-NEXT: blr
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entry:
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%0 = tail call i8* @llvm.frameaddress(i32 1) ; <i8*> [#uses=1]
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ret i8* %0
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}
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declare i8* @llvm.returnaddress(i32) nounwind readnone
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define i8* @g() nounwind readnone {
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; CHECK-LABEL: g:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr 0
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; CHECK-NEXT: stw 0, 4(1)
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; CHECK-NEXT: stwu 1, -16(1)
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; CHECK-NEXT: lwz 3, 0(1)
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; CHECK-NEXT: lwz 3, 0(3)
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; CHECK-NEXT: lwz 3, 4(3)
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; CHECK-NEXT: lwz 0, 20(1)
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; CHECK-NEXT: addi 1, 1, 16
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; CHECK-NEXT: mtlr 0
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; CHECK-NEXT: blr
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entry:
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%0 = tail call i8* @llvm.returnaddress(i32 1) ; <i8*> [#uses=1]
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ret i8* %0
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}
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