ba627a32e1
This patch includes the following updates to the load/store refactoring effort introduced in D93370: - Update various VSX patterns that use to "force" an XForm, to instead just XForm. This allows the ability for the patterns to compute the most optimal addressing mode (and to produce a DForm instruction when possible) - Update pattern and test case for the LXVD2X/STXVD2X intrinsics - Update LIT test cases that use to use the XForm instruction to use the DForm instruction Differential Revision: https://reviews.llvm.org/D95115
55 lines
2.4 KiB
LLVM
55 lines
2.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
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; RUN: -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff < %s | \
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; RUN: FileCheck %s
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;; Fixed vector arguments to variadic functions are passed differently than
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;; either arguments to non-variadic functions or arguments passed through
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;; ellipses.
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define double @callee(i32 signext %count, <4 x i32> %vsi, double %next, ...) {
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; CHECK-LABEL: name: callee
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; CHECK: bb.0.entry:
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; CHECK: liveins: $x8, $x9, $x10
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; CHECK: [[COPY:%[0-9]+]]:g8rc = COPY $x10
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; CHECK: [[COPY1:%[0-9]+]]:g8rc = COPY $x9
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; CHECK: [[COPY2:%[0-9]+]]:g8rc = COPY $x8
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; CHECK: STD [[COPY2]], 0, %fixed-stack.0 :: (store (s64) into %fixed-stack.0)
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; CHECK: STD [[COPY1]], 8, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 8)
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; CHECK: STD [[COPY]], 16, %fixed-stack.0 :: (store (s64))
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; CHECK: LIFETIME_START %stack.0.arg_list
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; CHECK: [[ADDI8_:%[0-9]+]]:g8rc = ADDI8 %fixed-stack.0, 0
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; CHECK: STD killed [[ADDI8_]], 0, %stack.0.arg_list :: (store (s64) into %ir.0)
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; CHECK: [[ADDI8_1:%[0-9]+]]:g8rc = ADDI8 %fixed-stack.0, 15
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; CHECK: [[RLDICR:%[0-9]+]]:g8rc_and_g8rc_nox0 = RLDICR killed [[ADDI8_1]], 0, 59
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; CHECK: [[LFD:%[0-9]+]]:f8rc = LFD 16, killed [[RLDICR]] :: (load (s64) from %ir.4, align 16)
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; CHECK: LIFETIME_END %stack.0.arg_list
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; CHECK: $f1 = COPY [[LFD]]
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; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $f1
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entry:
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%arg_list = alloca i8*, align 8
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%0 = bitcast i8** %arg_list to i8*
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call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
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call void @llvm.va_start(i8* nonnull %0)
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%argp.cur = load i8*, i8** %arg_list, align 8
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%1 = ptrtoint i8* %argp.cur to i64
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%2 = add i64 %1, 15
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%3 = and i64 %2, -16
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%argp.cur.aligned = inttoptr i64 %3 to i8*
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%argp.next = getelementptr inbounds i8, i8* %argp.cur.aligned, i64 16
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%argp.next3 = getelementptr inbounds i8, i8* %argp.cur.aligned, i64 24
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store i8* %argp.next3, i8** %arg_list, align 8
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%4 = bitcast i8* %argp.next to double*
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%5 = load double, double* %4, align 16
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call void @llvm.va_end(i8* nonnull %0)
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call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %0)
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ret double %5
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}
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declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
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declare void @llvm.va_start(i8*)
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declare void @llvm.va_end(i8*)
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declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
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