300e1293de
We are going to remove the old 'perfect shuffle' optimization since it brings performance penalty in hot loop around vectors. For example, in following loop sharing the same mask: %v.1 = shufflevector ... <0,1,2,3,8,9,10,11,16,17,18,19,24,25,26,27> %v.2 = shufflevector ... <0,1,2,3,8,9,10,11,16,17,18,19,24,25,26,27> The generated instructions will be `vmrglw-vmrghw-vmrglw-vmrghw` instead of `vperm-vperm`. In some large loop cases, this causes 20%+ performance penalty. The original attempt to resolve this is to pre-record masks of every shufflevector operation in DAG, but that is somewhat complex and brings unnecessary computation (to scan all nodes) in optimization. Here we disable it by default. There're indeed some cases becoming worse after this, which will be fixed in a more careful way in future patches. Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D121082
33 lines
988 B
LLVM
33 lines
988 B
LLVM
; RUN: llc -verify-machineinstrs -ppc-disable-perfect-shuffle=false < %s | FileCheck %s
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; TODO: Fix this case when disabling perfect shuffle
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind
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define <2 x i32> @test1(<4 x i32> %wide.vec) #0 {
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entry:
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%strided.vec = shufflevector <4 x i32> %wide.vec, <4 x i32> undef, <2 x i32> <i32 0, i32 2>
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ret <2 x i32> %strided.vec
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; CHECK-LABEL: @test1
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; CHECK: xxswapd 0, 34
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; CHECK: xxmrghw 34, 34, 0
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; CHECK: blr
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}
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; Function Attrs: nounwind
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define <16 x i8> @test2(<16 x i8> %wide.vec) #0 {
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entry:
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%strided.vec = shufflevector <16 x i8> %wide.vec, <16 x i8> undef, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 8, i32 9, i32 10, i32 11>
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ret <16 x i8> %strided.vec
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; CHECK-LABEL: @test2
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; CHECK: xxsldwi 34, 34, 34, 3
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; CHECK: blr
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}
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attributes #0 = { nounwind "target-cpu"="pwr7" }
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