a9d5bb926d
`__gnu_h2f_ieee` and `__gnu_f2h_ieee` are introduce by ARM and set that as default name for fp16 and fp32 conversion in LLVM. However RISC-V GCC using default naming scheme for that, which is `__extendhfsf2` and `__truncsfhf2` for that, that cause runtime ABI incompatible issue. Although we didn't have formal runtime ABI spec to specify those naming convention yet, but I think it would be great to fix the incompatible issue first. And I've plan to create a runtime ABI spec undere psABI spec this year. Reviewed By: asb Differential Revision: https://reviews.llvm.org/D118207
143 lines
4.6 KiB
LLVM
143 lines
4.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr +d -target-abi ilp32d < %s | FileCheck %s
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define void @test_load_store(half* %p, half* %q) nounwind {
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; CHECK-LABEL: test_load_store:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lh a0, 0(a0)
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; CHECK-NEXT: sh a0, 0(a1)
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; CHECK-NEXT: ret
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%a = load half, half* %p
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store half %a, half* %q
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ret void
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}
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define float @test_fpextend_float(half* %p) nounwind {
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; CHECK-LABEL: test_fpextend_float:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; CHECK-NEXT: lhu a0, 0(a0)
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; CHECK-NEXT: call __extendhfsf2@plt
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; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: ret
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%a = load half, half* %p
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%r = fpext half %a to float
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ret float %r
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}
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define double @test_fpextend_double(half* %p) nounwind {
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; CHECK-LABEL: test_fpextend_double:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; CHECK-NEXT: lhu a0, 0(a0)
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; CHECK-NEXT: call __extendhfsf2@plt
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; CHECK-NEXT: fcvt.d.s fa0, fa0
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; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: ret
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%a = load half, half* %p
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%r = fpext half %a to double
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ret double %r
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}
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define void @test_fptrunc_float(float %f, half* %p) nounwind {
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; CHECK-LABEL: test_fptrunc_float:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
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; CHECK-NEXT: mv s0, a0
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; CHECK-NEXT: call __truncsfhf2@plt
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; CHECK-NEXT: sh a0, 0(s0)
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; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: ret
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%a = fptrunc float %f to half
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store half %a, half* %p
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ret void
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}
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define void @test_fptrunc_double(double %d, half* %p) nounwind {
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; CHECK-LABEL: test_fptrunc_double:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
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; CHECK-NEXT: mv s0, a0
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; CHECK-NEXT: call __truncdfhf2@plt
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; CHECK-NEXT: sh a0, 0(s0)
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; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: ret
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%a = fptrunc double %d to half
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store half %a, half* %p
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ret void
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}
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define void @test_fadd(half* %p, half* %q) nounwind {
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; CHECK-LABEL: test_fadd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -32
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; CHECK-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
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; CHECK-NEXT: fsd fs0, 8(sp) # 8-byte Folded Spill
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; CHECK-NEXT: mv s0, a0
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; CHECK-NEXT: lhu s1, 0(a0)
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; CHECK-NEXT: lhu a0, 0(a1)
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; CHECK-NEXT: call __extendhfsf2@plt
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; CHECK-NEXT: fmv.s fs0, fa0
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; CHECK-NEXT: mv a0, s1
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; CHECK-NEXT: call __extendhfsf2@plt
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; CHECK-NEXT: fadd.s fa0, fa0, fs0
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; CHECK-NEXT: call __truncsfhf2@plt
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; CHECK-NEXT: sh a0, 0(s0)
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; CHECK-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
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; CHECK-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 32
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; CHECK-NEXT: ret
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%a = load half, half* %p
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%b = load half, half* %q
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%r = fadd half %a, %b
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store half %r, half* %p
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ret void
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}
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define void @test_fmul(half* %p, half* %q) nounwind {
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; CHECK-LABEL: test_fmul:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -32
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; CHECK-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
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; CHECK-NEXT: fsd fs0, 8(sp) # 8-byte Folded Spill
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; CHECK-NEXT: mv s0, a0
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; CHECK-NEXT: lhu s1, 0(a0)
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; CHECK-NEXT: lhu a0, 0(a1)
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; CHECK-NEXT: call __extendhfsf2@plt
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; CHECK-NEXT: fmv.s fs0, fa0
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; CHECK-NEXT: mv a0, s1
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; CHECK-NEXT: call __extendhfsf2@plt
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; CHECK-NEXT: fmul.s fa0, fa0, fs0
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; CHECK-NEXT: call __truncsfhf2@plt
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; CHECK-NEXT: sh a0, 0(s0)
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; CHECK-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
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; CHECK-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 32
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; CHECK-NEXT: ret
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%a = load half, half* %p
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%b = load half, half* %q
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%r = fmul half %a, %b
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store half %r, half* %p
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ret void
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}
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