9b0f227d7b
The mask being NoRegister prevented the existing aliases from matching since NoRegister isn't in the VMV0 register class. To workaround this I've added new aliases that look for zero_reg. I had to motify tablegen to generate matching code for zero_reg. And as a consequence, I had to change the EmitPriority for an ARM alias that used zero_reg that started printing. Reviewed By: frasercrmck Differential Revision: https://reviews.llvm.org/D121496
62 lines
1.3 KiB
YAML
62 lines
1.3 KiB
YAML
# RUN: llc -mtriple riscv32 -mattr=+v -start-after riscv-expand-pseudo -o - %s | FileCheck %s
|
|
# RUN: llc -mtriple riscv64 -mattr=+v -start-after riscv-expand-pseudo -o - %s | FileCheck %s
|
|
|
|
--- |
|
|
define void @vnot_mask_1() {
|
|
ret void
|
|
}
|
|
define void @vnot_mask_2() {
|
|
ret void
|
|
}
|
|
define void @vnot_no_mask_1() {
|
|
ret void
|
|
}
|
|
define void @vnot_no_mask_2() {
|
|
ret void
|
|
}
|
|
...
|
|
---
|
|
name: vnot_mask_1
|
|
body: |
|
|
bb.0:
|
|
liveins: $v0, $v25
|
|
|
|
; CHECK-LABEL: vnot_mask_1:
|
|
; CHECK: vnot.v v25, v25, v0.t
|
|
|
|
$v25 = VXOR_VI killed $v25, -1, $v0, implicit $vtype, implicit $vl
|
|
...
|
|
---
|
|
name: vnot_mask_2
|
|
body: |
|
|
bb.0:
|
|
liveins: $v0, $v25
|
|
|
|
; CHECK-LABEL: vnot_mask_2:
|
|
; CHECK: vnot.v v1, v25, v0.t
|
|
|
|
$v1 = VXOR_VI killed $v25, -1, $v0, implicit $vtype, implicit $vl
|
|
...
|
|
---
|
|
name: vnot_no_mask_1
|
|
body: |
|
|
bb.0:
|
|
liveins: $v25
|
|
|
|
; CHECK-LABEL: vnot_no_mask_1:
|
|
; CHECK: vnot.v v25, v25
|
|
|
|
$v25 = VXOR_VI killed $v25, -1, $noreg, implicit $vtype, implicit $vl
|
|
...
|
|
---
|
|
name: vnot_no_mask_2
|
|
body: |
|
|
bb.0:
|
|
liveins: $v25
|
|
|
|
; CHECK-LABEL: vnot_no_mask_2:
|
|
; CHECK: vnot.v v1, v25
|
|
|
|
$v1 = VXOR_VI killed $v25, -1, $noreg, implicit $vtype, implicit $vl
|
|
...
|