5d47e7d768
The implicit defines may come from a partial define in an instruction. It does not mean the defining instruction and the COPY instruction have the same vl and vtype. When the source comes from the implicit defines, do not convert the whole register copies to vmv.v.v. Differential Revision: https://reviews.llvm.org/D115866
330 lines
14 KiB
YAML
330 lines
14 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -verify-machineinstrs -mtriple riscv64 -run-pass=postrapseudos %s -o - | FileCheck %s
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...
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---
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name: copy_different_lmul
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x14, $x16
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; 82 = e32,m4
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; CHECK-LABEL: name: copy_different_lmul
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; CHECK: liveins: $x14, $x16
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v12m2 = PseudoVMV2R_V $v28m2
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$x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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$v28m4 = PseudoVLE32_V_M4 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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$v12m2 = COPY $v28m2
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...
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---
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name: copy_convert_to_vmv_v_v
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x14, $x16
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; 82 = e32,m4
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; CHECK-LABEL: name: copy_convert_to_vmv_v_v
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; CHECK: liveins: $x14, $x16
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v12m4 = PseudoVMV_V_V_M4 $v28m4, $noreg, 5, implicit $vl, implicit $vtype
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$x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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$v28m4 = PseudoVLE32_V_M4 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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$v12m4 = COPY $v28m4
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...
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---
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name: copy_convert_to_vmv_v_i
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x14
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; 82 = e32,m4
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; CHECK-LABEL: name: copy_convert_to_vmv_v_i
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; CHECK: liveins: $x14
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v28m4 = PseudoVMV_V_I_M4 0, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v12m4 = PseudoVMV_V_I_M4 0, $noreg, 5, implicit $vl, implicit $vtype
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$x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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$v28m4 = PseudoVMV_V_I_M4 0, $noreg, 5, implicit $vl, implicit $vtype
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$v12m4 = COPY $v28m4
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...
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---
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name: copy_from_whole_load_store
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x14, $x16
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; 82 = e32,m4
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; CHECK-LABEL: name: copy_from_whole_load_store
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; CHECK: liveins: $x14, $x16
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v28m4 = VL4RE32_V $x16
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; CHECK-NEXT: $v12m4 = PseudoVMV4R_V $v28m4
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$x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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$v28m4 = VL4RE32_V $x16
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$v12m4 = COPY $v28m4
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...
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---
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name: copy_with_vleff
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x14, $x16
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; 82 = e32,m4
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; CHECK-LABEL: name: copy_with_vleff
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; CHECK: liveins: $x14, $x16
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v28m4 = PseudoVMV_V_I_M4 0, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v4m4 = PseudoVLE32FF_V_M4 $x16, $noreg, 5, implicit-def $vl
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; CHECK-NEXT: $v12m4 = PseudoVMV4R_V $v28m4
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$x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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$v28m4 = PseudoVMV_V_I_M4 0, $noreg, 5, implicit $vl, implicit $vtype
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$v4m4 = PseudoVLE32FF_V_M4 $x16, $noreg, 5, implicit-def $vl
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$v12m4 = COPY $v28m4
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...
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---
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name: copy_with_vsetvl_x0_x0_1
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x14, $x16, $x17, $x18
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; 82 = e32,m4
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; 73 = e16,m2
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; CHECK-LABEL: name: copy_with_vsetvl_x0_x0_1
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; CHECK: liveins: $x14, $x16, $x17, $x18
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $x15 = PseudoVSETVLI $x17, 73, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v0m2 = PseudoVLE32_V_M2 $x18, $noreg, 4, implicit $vl, implicit $vtype
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; CHECK-NEXT: $x0 = PseudoVSETVLIX0 $x0, 82, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v4m4 = PseudoVLE32_V_M4 killed $x18, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v12m4 = PseudoVMV4R_V $v28m4
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$x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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$v28m4 = PseudoVLE32_V_M4 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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$x15 = PseudoVSETVLI $x17, 73, implicit-def $vl, implicit-def $vtype
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$v0m2 = PseudoVLE32_V_M2 $x18, $noreg, 4, implicit $vl, implicit $vtype
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$x0 = PseudoVSETVLIX0 $x0, 82, implicit-def $vl, implicit-def $vtype
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$v4m4 = PseudoVLE32_V_M4 killed $x18, $noreg, 5, implicit $vl, implicit $vtype
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$v12m4 = COPY $v28m4
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...
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---
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name: copy_with_vsetvl_x0_x0_2
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x14, $x16, $x17, $x18
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; 82 = e32,m4
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; 73 = e16,m2
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; CHECK-LABEL: name: copy_with_vsetvl_x0_x0_2
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; CHECK: liveins: $x14, $x16, $x17, $x18
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $x0 = PseudoVSETVLIX0 $x0, 73, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v0m2 = PseudoVLE32_V_M2 $x18, $noreg, 4, implicit $vl, implicit $vtype
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; CHECK-NEXT: $x0 = PseudoVSETVLIX0 $x0, 82, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v4m4 = PseudoVLE32_V_M4 killed $x18, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v12m4 = PseudoVMV_V_V_M4 $v28m4, $noreg, 5, implicit $vl, implicit $vtype
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$x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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$v28m4 = PseudoVLE32_V_M4 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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$x0 = PseudoVSETVLIX0 $x0, 73, implicit-def $vl, implicit-def $vtype
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$v0m2 = PseudoVLE32_V_M2 $x18, $noreg, 4, implicit $vl, implicit $vtype
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$x0 = PseudoVSETVLIX0 $x0, 82, implicit-def $vl, implicit-def $vtype
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$v4m4 = PseudoVLE32_V_M4 killed $x18, $noreg, 5, implicit $vl, implicit $vtype
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$v12m4 = COPY $v28m4
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...
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---
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name: copy_with_vsetvl_x0_x0_3
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x14, $x16, $x17, $x18
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; 82 = e32,m4
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; 73 = e16,m2
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; CHECK-LABEL: name: copy_with_vsetvl_x0_x0_3
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; CHECK: liveins: $x14, $x16, $x17, $x18
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $x0 = PseudoVSETVLIX0 $x0, 73, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v0m2 = PseudoVLE32_V_M2 $x18, $noreg, 4, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v12m4 = PseudoVMV4R_V $v28m4
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$x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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$v28m4 = PseudoVLE32_V_M4 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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$x0 = PseudoVSETVLIX0 $x0, 73, implicit-def $vl, implicit-def $vtype
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$v0m2 = PseudoVLE32_V_M2 $x18, $noreg, 4, implicit $vl, implicit $vtype
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$v12m4 = COPY $v28m4
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...
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---
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name: copy_subregister
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x16, $x17
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; 73 = e16,m2
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; CHECK-LABEL: name: copy_subregister
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; CHECK: liveins: $x16, $x17
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x15 = PseudoVSETIVLI 4, 73, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v26m2 = PseudoVLE16_V_M2 killed $x16, $noreg, 4, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v8m2 = PseudoVLE16_V_M2 killed $x17, $noreg, 4, implicit $vl, implicit $vtype
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; CHECK-NEXT: early-clobber $v28m4 = PseudoVWADD_VV_M2 $v26m2, $v8m2, $noreg, 4, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v12m2 = PseudoVMV2R_V $v28m2
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$x15 = PseudoVSETIVLI 4, 73, implicit-def $vl, implicit-def $vtype
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$v26m2 = PseudoVLE16_V_M2 killed $x16, $noreg, 4, implicit $vl, implicit $vtype
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$v8m2 = PseudoVLE16_V_M2 killed $x17, $noreg, 4, implicit $vl, implicit $vtype
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$v28m4 = PseudoVWADD_VV_M2 $v26m2, $v8m2, $noreg, 4, implicit $vl, implicit $vtype
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$v12m2 = COPY $v28m2
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...
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---
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name: copy_from_reload
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x14, $x16, $x17
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; 73 = e16,m2
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; CHECK-LABEL: name: copy_from_reload
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; CHECK: liveins: $x14, $x16, $x17
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 73, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v2m2 = PseudoVLE16_V_M2 killed $x16, $noreg, 4, implicit $vl, implicit $vtype
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; CHECK-NEXT: $x12 = PseudoReadVLENB
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; CHECK-NEXT: $x12 = SLLI $x12, 1
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; CHECK-NEXT: $v2m2_v4m2 = PseudoVRELOAD2_M2 killed $x17, killed $x12
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; CHECK-NEXT: $v12m2 = PseudoVMV2R_V $v2m2
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$x15 = PseudoVSETVLI $x14, 73, implicit-def $vl, implicit-def $vtype
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$v2m2 = PseudoVLE16_V_M2 killed $x16, $noreg, 4, implicit $vl, implicit $vtype
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$x12 = PseudoReadVLENB
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$x12 = SLLI $x12, 1
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$v2m2_v4m2 = PseudoVRELOAD2_M2 killed $x17, killed $x12
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$v12m2 = COPY $v2m2
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...
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---
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name: copy_with_different_vlmax
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x14, $x16
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; 82 = e32,m4
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; 74 = e16,m4
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; CHECK-LABEL: name: copy_with_different_vlmax
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; CHECK: liveins: $x14, $x16
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v28m4 = PseudoVLE32_V_M4 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $x0 = PseudoVSETVLIX0 $x0, 74, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v12m4 = PseudoVMV4R_V $v28m4
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$x15 = PseudoVSETVLI $x14, 82, implicit-def $vl, implicit-def $vtype
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$v28m4 = PseudoVLE32_V_M4 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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$x0 = PseudoVSETVLIX0 $x0, 74, implicit-def $vl, implicit-def $vtype
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$v12m4 = COPY $v28m4
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...
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---
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name: copy_with_widening_reduction
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10, $v8, $v26, $v27
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; CHECK-LABEL: name: copy_with_widening_reduction
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; CHECK: liveins: $x10, $v8, $v26, $v27
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x11 = PseudoVSETIVLI 1, 64, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v8 = PseudoVWREDSUM_VS_M1 killed renamable $v8, killed renamable $v26, killed renamable $v27, 1, 3, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v26 = PseudoVMV1R_V killed $v8
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; CHECK-NEXT: $x10 = PseudoVSETVLI killed renamable $x10, 75, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v8m8 = PseudoVRELOAD_M8 killed $x10
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$x11 = PseudoVSETIVLI 1, 64, implicit-def $vl, implicit-def $vtype
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$v8 = PseudoVWREDSUM_VS_M1 killed renamable $v8, killed renamable $v26, killed renamable $v27, 1, 3, implicit $vl, implicit $vtype
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$v26 = COPY killed renamable $v8
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$x10 = PseudoVSETVLI killed renamable $x10, 75, implicit-def $vl, implicit-def $vtype
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$v8m8 = PseudoVRELOAD_M8 killed $x10
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...
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---
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name: copy_zvlsseg_reg
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x14, $x16
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; 80 = e32,m1
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; CHECK-LABEL: name: copy_zvlsseg_reg
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; CHECK: liveins: $x14, $x16
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 80, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v8_v9 = PseudoVLSEG2E32_V_M1 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v10 = PseudoVMV1R_V $v8
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$x15 = PseudoVSETVLI $x14, 80, implicit-def $vl, implicit-def $vtype
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$v8_v9 = PseudoVLSEG2E32_V_M1 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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$v10 = COPY $v8
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...
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---
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name: copy_zvlsseg_reg_2
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x14, $x16
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; 80 = e32,m1
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; CHECK-LABEL: name: copy_zvlsseg_reg_2
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; CHECK: liveins: $x14, $x16
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 80, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v8_v9 = PseudoVLSEG2E32_V_M1 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v10 = PseudoVMV_V_V_M1 $v8, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v11 = PseudoVMV_V_V_M1 $v9, $noreg, 5, implicit $vl, implicit $vtype
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$x15 = PseudoVSETVLI $x14, 80, implicit-def $vl, implicit-def $vtype
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$v8_v9 = PseudoVLSEG2E32_V_M1 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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$v10_v11 = COPY $v8_v9
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...
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---
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name: copy_fractional_lmul
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x14, $x16
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; 87 = e32,mf2
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; CHECK-LABEL: name: copy_fractional_lmul
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; CHECK: liveins: $x14, $x16
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x15 = PseudoVSETVLI $x14, 87, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v28 = PseudoVLE32_V_MF2 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v12 = PseudoVMV1R_V $v28
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$x15 = PseudoVSETVLI $x14, 87, implicit-def $vl, implicit-def $vtype
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$v28 = PseudoVLE32_V_MF2 killed $x16, $noreg, 5, implicit $vl, implicit $vtype
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$v12 = COPY $v28
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...
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---
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name: copy_implicit_def
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x12, $x14, $x16
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; 80 = e32,m1
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; CHECK-LABEL: name: copy_implicit_def
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; CHECK: liveins: $x12, $x14, $x16
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x0 = PseudoVSETVLI $x14, 80, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v8_v9_v10_v11_v12_v13_v14_v15 = PseudoVLSEG8E32_V_M1 killed $x12, $noreg, 5, implicit $vl, implicit $vtype
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; CHECK-NEXT: $x0 = PseudoVSETIVLI 10, 80, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: $v15 = PseudoVLE32_V_M1 killed $x16, $noreg, 5, implicit $vl, implicit $vtype, implicit killed $v8_v9_v10_v11_v12_v13_v14_v15, implicit-def $v8_v9_v10_v11_v12_v13_v14_v15
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; CHECK-NEXT: $v24 = PseudoVMV1R_V killed $v8
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; CHECK-NEXT: $v25 = PseudoVMV1R_V killed $v9
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; CHECK-NEXT: $v26 = PseudoVMV1R_V killed $v10
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; CHECK-NEXT: $v27 = PseudoVMV1R_V killed $v11
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; CHECK-NEXT: $v28 = PseudoVMV1R_V killed $v12
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; CHECK-NEXT: $v29 = PseudoVMV1R_V killed $v13
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; CHECK-NEXT: $v30 = PseudoVMV1R_V killed $v14
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; CHECK-NEXT: $v31 = PseudoVMV1R_V killed $v15
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$x0 = PseudoVSETVLI $x14, 80, implicit-def $vl, implicit-def $vtype
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$v8_v9_v10_v11_v12_v13_v14_v15 = PseudoVLSEG8E32_V_M1 killed $x12, $noreg, 5, implicit $vl, implicit $vtype
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$x0 = PseudoVSETIVLI 10, 80, implicit-def $vl, implicit-def $vtype
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$v15 = PseudoVLE32_V_M1 killed $x16, $noreg, 5, implicit $vl, implicit $vtype, implicit killed $v8_v9_v10_v11_v12_v13_v14_v15, implicit-def $v8_v9_v10_v11_v12_v13_v14_v15
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$v24_v25_v26_v27_v28_v29_v30_v31 = COPY killed $v8_v9_v10_v11_v12_v13_v14_v15
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...
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