Files
clang-p2996/llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll
Matt Arsenault 4a36e96c3f RegAllocGreedy: Account for reserved registers in num regs heuristic
This simple heuristic uses the estimated live range length combined
with the number of registers in the class to switch which heuristic to
use. This was taking the raw number of registers in the class, even
though not all of them may be available. AMDGPU heavily relies on
dynamically reserved numbers of registers based on user attributes to
satisfy occupancy constraints, so the raw number is highly misleading.

There are still a few problems here. In the original testcase that
made me notice this, the live range size is incorrect after the
scheduler rearranges instructions, since the instructions don't have
the original InstrDist offsets. Additionally, I think it would be more
appropriate to use the number of disjointly allocatable registers in
the class. For the AMDGPU register tuples, there are a large number of
registers in each tuple class, but only a small fraction can actually
be allocated at the same time since they all overlap with each
other. It seems we do not have a query that corresponds to the number
of independently allocatable registers. Relatedly, I'm still debugging
some allocation failures where overlapping tuples seem to not be
handled correctly.

The test changes are mostly noise. There are a handful of x86 tests
that look like regressions with an additional spill, and a handful
that now avoid a spill. The worst looking regression is likely
test/Thumb2/mve-vld4.ll which introduces a few additional
spills. test/CodeGen/AMDGPU/soft-clause-exceeds-register-budget.ll
shows a massive improvement by completely eliminating a large number
of spills inside a loop.
2021-09-14 21:00:29 -04:00

131 lines
5.3 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-apple-darwin -disable-cgp-branch-opts | FileCheck %s
%struct.DBC_t = type { i32, i8*, i16, %struct.DBC_t*, i8*, i8*, i8*, i8*, i8*, %struct.DBC_t*, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32*, i8, i16, %struct.DRVOPT*, i16 }
%struct.DRVOPT = type { i16, i32, i8, %struct.DRVOPT* }
%struct.GENV_t = type { i32, i8*, i16, i8*, i8*, i32, i32, i32, i32, %struct.DBC_t*, i16 }
%struct.pthread_mutex_t = type { i32, [40 x i8] }
@iodbcdm_global_lock = external global %struct.pthread_mutex_t ; <%struct.pthread_mutex_t*> [#uses=1]
define i16 @SQLDriversW(i8* %henv, i16 zeroext %fDir, i32* %szDrvDesc, i16 signext %cbDrvDescMax, i16* %pcbDrvDesc, i32* %szDrvAttr, i16 signext %cbDrvAttrMax, i16* %pcbDrvAttr) nounwind {
; CHECK-LABEL: SQLDriversW:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: pushl %ebp
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: pushl %edi
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: subl $12, %esp
; CHECK-NEXT: movb $1, %al
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: je LBB0_1
; CHECK-NEXT: ## %bb.3: ## %bb28
; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %ebx
; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %ebp
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edi
; CHECK-NEXT: movw $-2, %si
; CHECK-NEXT: jne LBB0_6
; CHECK-NEXT: ## %bb.4: ## %bb37
; CHECK-NEXT: movw $0, 40(%edi)
; CHECK-NEXT: movb $1, %al
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: leal (,%ecx,4), %ecx
; CHECK-NEXT: leal (,%ebx,4), %edx
; CHECK-NEXT: subl $12, %esp
; CHECK-NEXT: movzwl %bp, %eax
; CHECK-NEXT: movswl %cx, %ecx
; CHECK-NEXT: movswl %dx, %edx
; CHECK-NEXT: pushl $87
; CHECK-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-NEXT: pushl %ecx
; CHECK-NEXT: pushl $0
; CHECK-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-NEXT: pushl %edx
; CHECK-NEXT: pushl $0
; CHECK-NEXT: pushl %eax
; CHECK-NEXT: pushl %edi
; CHECK-NEXT: calll _SQLDrivers_Internal
; CHECK-NEXT: addl $48, %esp
; CHECK-NEXT: movl %eax, %esi
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: je LBB0_1
; CHECK-NEXT: ## %bb.5:
; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: LBB0_6: ## %done
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: je LBB0_7
; CHECK-NEXT: ## %bb.8: ## %bb167
; CHECK-NEXT: subl $12, %esp
; CHECK-NEXT: movl L_iodbcdm_global_lock$non_lazy_ptr, %eax
; CHECK-NEXT: pushl %eax
; CHECK-NEXT: calll _pthread_mutex_unlock
; CHECK-NEXT: addl $16, %esp
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: jmp LBB0_2
; CHECK-NEXT: LBB0_7: ## %bb150
; CHECK-NEXT: movswl %si, %eax
; CHECK-NEXT: subl $8, %esp
; CHECK-NEXT: movswl %cx, %ecx
; CHECK-NEXT: movswl %bx, %edx
; CHECK-NEXT: movzwl %bp, %esi
; CHECK-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-NEXT: pushl %ecx
; CHECK-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-NEXT: pushl %edx
; CHECK-NEXT: pushl {{[0-9]+}}(%esp)
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: pushl %edi
; CHECK-NEXT: pushl %eax
; CHECK-NEXT: pushl $1
; CHECK-NEXT: calll _trace_SQLDriversW
; CHECK-NEXT: addl $48, %esp
; CHECK-NEXT: LBB0_1: ## %bb
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: LBB0_2: ## %bb
; CHECK-NEXT: addl $12, %esp
; CHECK-NEXT: popl %esi
; CHECK-NEXT: popl %edi
; CHECK-NEXT: popl %ebx
; CHECK-NEXT: popl %ebp
; CHECK-NEXT: retl
entry:
%tmp12 = bitcast i8* %henv to %struct.GENV_t* ; <%struct.GENV_t*> [#uses=1]
br i1 true, label %bb28, label %bb
bb: ; preds = %entry
ret i16 0
bb28: ; preds = %entry
br i1 false, label %bb37, label %done
bb37: ; preds = %bb28
%tmp46 = getelementptr %struct.GENV_t, %struct.GENV_t* %tmp12, i32 0, i32 10 ; <i16*> [#uses=1]
store i16 0, i16* %tmp46, align 4
br i1 false, label %bb74, label %bb92
bb74: ; preds = %bb37
br label %bb92
bb92: ; preds = %bb74, %bb37
%tmp95180 = shl i16 %cbDrvAttrMax, 2 ; <i16> [#uses=1]
%tmp100178 = shl i16 %cbDrvDescMax, 2 ; <i16> [#uses=1]
%tmp113 = tail call i16 @SQLDrivers_Internal( i8* %henv, i16 zeroext %fDir, i8* null, i16 signext %tmp100178, i16* %pcbDrvDesc, i8* null, i16 signext %tmp95180, i16* %pcbDrvAttr, i8 zeroext 87 ) nounwind ; <i16> [#uses=1]
br i1 false, label %done, label %bb137
bb137: ; preds = %bb92
ret i16 0
done: ; preds = %bb92, %bb28
%retcode.0 = phi i16 [ -2, %bb28 ], [ %tmp113, %bb92 ] ; <i16> [#uses=2]
br i1 false, label %bb167, label %bb150
bb150: ; preds = %done
%tmp157158 = sext i16 %retcode.0 to i32 ; <i32> [#uses=1]
tail call void @trace_SQLDriversW( i32 1, i32 %tmp157158, i8* %henv, i16 zeroext %fDir, i32* %szDrvDesc, i16 signext %cbDrvDescMax, i16* %pcbDrvDesc, i32* %szDrvAttr, i16 signext %cbDrvAttrMax, i16* %pcbDrvAttr ) nounwind
ret i16 0
bb167: ; preds = %done
%tmp168 = tail call i32 @pthread_mutex_unlock( %struct.pthread_mutex_t* @iodbcdm_global_lock ) nounwind ; <i32> [#uses=0]
ret i16 %retcode.0
}
declare i32 @pthread_mutex_unlock(%struct.pthread_mutex_t*)
declare i16 @SQLDrivers_Internal(i8*, i16 zeroext , i8*, i16 signext , i16*, i8*, i16 signext , i16*, i8 zeroext ) nounwind
declare void @trace_SQLDriversW(i32, i32, i8*, i16 zeroext , i32*, i16 signext , i16*, i32*, i16 signext , i16*)