25528d6de7
As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
117 lines
3.4 KiB
LLVM
117 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=SKX
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; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skx -regbankselect-greedy -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=SKX
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define <4 x i32> @test_load_v4i32_noalign(<4 x i32> * %p1) {
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; SKX-LABEL: test_load_v4i32_noalign:
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; SKX: # %bb.0:
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; SKX-NEXT: vmovups (%rdi), %xmm0
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; SKX-NEXT: retq
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%r = load <4 x i32>, <4 x i32>* %p1, align 1
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ret <4 x i32> %r
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}
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define <4 x i32> @test_load_v4i32_align(<4 x i32> * %p1) {
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; SKX-LABEL: test_load_v4i32_align:
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; SKX: # %bb.0:
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; SKX-NEXT: vmovaps (%rdi), %xmm0
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; SKX-NEXT: retq
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%r = load <4 x i32>, <4 x i32>* %p1, align 16
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ret <4 x i32> %r
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}
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define <8 x i32> @test_load_v8i32_noalign(<8 x i32> * %p1) {
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; SKX-LABEL: test_load_v8i32_noalign:
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; SKX: # %bb.0:
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; SKX-NEXT: vmovups (%rdi), %ymm0
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; SKX-NEXT: retq
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%r = load <8 x i32>, <8 x i32>* %p1, align 1
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ret <8 x i32> %r
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}
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define <8 x i32> @test_load_v8i32_align(<8 x i32> * %p1) {
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; SKX-LABEL: test_load_v8i32_align:
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; SKX: # %bb.0:
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; SKX-NEXT: vmovaps (%rdi), %ymm0
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; SKX-NEXT: retq
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%r = load <8 x i32>, <8 x i32>* %p1, align 32
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ret <8 x i32> %r
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}
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define <16 x i32> @test_load_v16i32_noalign(<16 x i32> * %p1) {
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; SKX-LABEL: test_load_v16i32_noalign:
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; SKX: # %bb.0:
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; SKX-NEXT: vmovups (%rdi), %zmm0
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; SKX-NEXT: retq
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%r = load <16 x i32>, <16 x i32>* %p1, align 1
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ret <16 x i32> %r
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}
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define <16 x i32> @test_load_v16i32_align(<16 x i32> * %p1) {
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; SKX-LABEL: test_load_v16i32_align:
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; SKX: # %bb.0:
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; SKX-NEXT: vmovups (%rdi), %zmm0
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; SKX-NEXT: retq
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%r = load <16 x i32>, <16 x i32>* %p1, align 32
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ret <16 x i32> %r
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}
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define void @test_store_v4i32_noalign(<4 x i32> %val, <4 x i32>* %p1) {
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; SKX-LABEL: test_store_v4i32_noalign:
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; SKX: # %bb.0:
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; SKX-NEXT: vmovups %xmm0, (%rdi)
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; SKX-NEXT: retq
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store <4 x i32> %val, <4 x i32>* %p1, align 1
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ret void
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}
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define void @test_store_v4i32_align(<4 x i32> %val, <4 x i32>* %p1) {
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; SKX-LABEL: test_store_v4i32_align:
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; SKX: # %bb.0:
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; SKX-NEXT: vmovaps %xmm0, (%rdi)
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; SKX-NEXT: retq
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store <4 x i32> %val, <4 x i32>* %p1, align 16
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ret void
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}
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define void @test_store_v8i32_noalign(<8 x i32> %val, <8 x i32>* %p1) {
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; SKX-LABEL: test_store_v8i32_noalign:
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; SKX: # %bb.0:
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; SKX-NEXT: vmovups %ymm0, (%rdi)
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; SKX-NEXT: vzeroupper
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; SKX-NEXT: retq
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store <8 x i32> %val, <8 x i32>* %p1, align 1
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ret void
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}
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define void @test_store_v8i32_align(<8 x i32> %val, <8 x i32>* %p1) {
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; SKX-LABEL: test_store_v8i32_align:
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; SKX: # %bb.0:
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; SKX-NEXT: vmovaps %ymm0, (%rdi)
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; SKX-NEXT: vzeroupper
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; SKX-NEXT: retq
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store <8 x i32> %val, <8 x i32>* %p1, align 32
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ret void
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}
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define void @test_store_v16i32_noalign(<16 x i32> %val, <16 x i32>* %p1) {
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; SKX-LABEL: test_store_v16i32_noalign:
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; SKX: # %bb.0:
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; SKX-NEXT: vmovups %zmm0, (%rdi)
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; SKX-NEXT: vzeroupper
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; SKX-NEXT: retq
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store <16 x i32> %val, <16 x i32>* %p1, align 1
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ret void
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}
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define void @test_store_v16i32_align(<16 x i32> %val, <16 x i32>* %p1) {
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; SKX-LABEL: test_store_v16i32_align:
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; SKX: # %bb.0:
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; SKX-NEXT: vmovaps %zmm0, (%rdi)
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; SKX-NEXT: vzeroupper
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; SKX-NEXT: retq
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store <16 x i32> %val, <16 x i32>* %p1, align 64
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ret void
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}
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