0aef747b84
The motivation is that the update script has at least two deviations (`<...>@GOT`/`<...>@PLT`/ and not hiding pointer arithmetics) from what pretty much all the checklines were generated with, and most of the tests are still not updated, so each time one of the non-up-to-date tests is updated to see the effect of the code change, there is a lot of noise. Instead of having to deal with that each time, let's just deal with everything at once. This has been done via: ``` cd llvm-project/llvm/test/CodeGen/X86 grep -rl "; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py" | xargs -L1 <...>/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary <...>/llvm-project/build/bin/llc ``` Not all tests were regenerated, however.
102 lines
4.3 KiB
LLVM
102 lines
4.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-windows-msvc19.11.0 | FileCheck %s
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; This matches the code produced by clang/lib/CodeGen/bittest-intrin.c
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@sink = global i8 0, align 1
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define void @test32(i32* %base, i32 %idx) {
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; CHECK-LABEL: test32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btl %edx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb sink(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btcl %edx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb sink(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btrl %edx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb sink(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btsl %edx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb sink(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: lock btrl %edx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb sink(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: lock btsl %edx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb sink(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: lock btsl %edx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb sink(%rip)
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i8 asm sideeffect "btl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %base, i32 %idx)
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store volatile i8 %0, i8* @sink, align 1
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%1 = tail call i8 asm sideeffect "btcl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %base, i32 %idx)
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store volatile i8 %1, i8* @sink, align 1
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%2 = tail call i8 asm sideeffect "btrl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %base, i32 %idx)
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store volatile i8 %2, i8* @sink, align 1
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%3 = tail call i8 asm sideeffect "btsl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %base, i32 %idx)
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store volatile i8 %3, i8* @sink, align 1
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%4 = tail call i8 asm sideeffect "lock btrl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %base, i32 %idx)
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store volatile i8 %4, i8* @sink, align 1
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%5 = tail call i8 asm sideeffect "lock btsl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %base, i32 %idx)
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store volatile i8 %5, i8* @sink, align 1
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%6 = tail call i8 asm sideeffect "lock btsl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %base, i32 %idx)
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store volatile i8 %6, i8* @sink, align 1
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ret void
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}
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; Function Attrs: nounwind uwtable
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define void @test64(i64* %base, i64 %idx) {
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; CHECK-LABEL: test64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btq %rdx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb sink(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btcq %rdx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb sink(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btrq %rdx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb sink(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btsq %rdx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb sink(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: lock btrq %rdx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb sink(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: lock btsq %rdx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb sink(%rip)
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i8 asm sideeffect "btq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %base, i64 %idx)
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store volatile i8 %0, i8* @sink, align 1
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%1 = tail call i8 asm sideeffect "btcq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %base, i64 %idx)
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store volatile i8 %1, i8* @sink, align 1
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%2 = tail call i8 asm sideeffect "btrq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %base, i64 %idx)
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store volatile i8 %2, i8* @sink, align 1
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%3 = tail call i8 asm sideeffect "btsq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %base, i64 %idx)
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store volatile i8 %3, i8* @sink, align 1
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%4 = tail call i8 asm sideeffect "lock btrq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %base, i64 %idx)
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store volatile i8 %4, i8* @sink, align 1
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%5 = tail call i8 asm sideeffect "lock btsq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %base, i64 %idx)
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store volatile i8 %5, i8* @sink, align 1
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ret void
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}
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