c22dc71b12
I had manually removed unused prefixes from CodeGen/X86 directory for more than 100 tests. I checked the change history for each of them at the beginning, and then I mainly focused on the format since I found all of the unused prefixes were result from either insensible copy or residuum after functional update. I think it's OK to remove the remaining X86 tests by script now. I wrote a rough script which works for me in most tests. I put it in llvm/utils temporarily for review and hope it may help other components owners. The tests in this patch are all generated by the tool and checked by update tool for the autogenerated tests. I skimmed them and checked about 30 tests and didn't find any unexpected changes. Reviewed By: mtrofin, MaskRay Differential Revision: https://reviews.llvm.org/D91496
145 lines
4.4 KiB
LLVM
145 lines
4.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefixes=CHECK,BEXTR-SLOW,BMI1-SLOW
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefixes=CHECK,BEXTR-SLOW,BMI2-SLOW
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+fast-bextr | FileCheck %s --check-prefixes=CHECK,BEXTR-FAST
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2,+fast-bextr | FileCheck %s --check-prefixes=CHECK,BEXTR-FAST
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declare i64 @llvm.x86.bmi.bextr.64(i64, i64)
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define i64 @bextr64(i64 %x, i64 %y) {
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; CHECK-LABEL: bextr64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: bextrq %rsi, %rdi, %rax
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; CHECK-NEXT: retq
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%tmp = tail call i64 @llvm.x86.bmi.bextr.64(i64 %x, i64 %y)
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ret i64 %tmp
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}
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define i64 @bextr64b(i64 %x) uwtable ssp {
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; BEXTR-SLOW-LABEL: bextr64b:
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; BEXTR-SLOW: # %bb.0:
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; BEXTR-SLOW-NEXT: movq %rdi, %rax
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; BEXTR-SLOW-NEXT: shrl $4, %eax
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; BEXTR-SLOW-NEXT: andl $4095, %eax # imm = 0xFFF
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; BEXTR-SLOW-NEXT: retq
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;
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; BEXTR-FAST-LABEL: bextr64b:
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; BEXTR-FAST: # %bb.0:
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; BEXTR-FAST-NEXT: movl $3076, %eax # imm = 0xC04
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; BEXTR-FAST-NEXT: bextrl %eax, %edi, %eax
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; BEXTR-FAST-NEXT: retq
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%1 = lshr i64 %x, 4
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%2 = and i64 %1, 4095
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ret i64 %2
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}
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; Make sure we still use the AH subreg trick to extract 15:8
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define i64 @bextr64_subreg(i64 %x) uwtable ssp {
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; CHECK-LABEL: bextr64_subreg:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: movzbl %ah, %eax
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; CHECK-NEXT: retq
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%1 = lshr i64 %x, 8
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%2 = and i64 %1, 255
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ret i64 %2
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}
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define i64 @bextr64b_load(i64* %x) {
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; BEXTR-SLOW-LABEL: bextr64b_load:
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; BEXTR-SLOW: # %bb.0:
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; BEXTR-SLOW-NEXT: movl (%rdi), %eax
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; BEXTR-SLOW-NEXT: shrl $4, %eax
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; BEXTR-SLOW-NEXT: andl $4095, %eax # imm = 0xFFF
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; BEXTR-SLOW-NEXT: retq
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;
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; BEXTR-FAST-LABEL: bextr64b_load:
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; BEXTR-FAST: # %bb.0:
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; BEXTR-FAST-NEXT: movl $3076, %eax # imm = 0xC04
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; BEXTR-FAST-NEXT: bextrl %eax, (%rdi), %eax
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; BEXTR-FAST-NEXT: retq
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%1 = load i64, i64* %x, align 8
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%2 = lshr i64 %1, 4
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%3 = and i64 %2, 4095
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ret i64 %3
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}
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; PR34042
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define i64 @bextr64c(i64 %x, i32 %y) {
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; CHECK-LABEL: bextr64c:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: bextrq %rsi, %rdi, %rax
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; CHECK-NEXT: retq
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%tmp0 = sext i32 %y to i64
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%tmp1 = tail call i64 @llvm.x86.bmi.bextr.64(i64 %x, i64 %tmp0)
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ret i64 %tmp1
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}
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define i64 @bextr64d(i64 %a) {
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; BMI1-SLOW-LABEL: bextr64d:
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; BMI1-SLOW: # %bb.0: # %entry
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; BMI1-SLOW-NEXT: shrq $2, %rdi
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; BMI1-SLOW-NEXT: movl $8448, %eax # imm = 0x2100
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; BMI1-SLOW-NEXT: bextrq %rax, %rdi, %rax
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; BMI1-SLOW-NEXT: retq
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;
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; BMI2-SLOW-LABEL: bextr64d:
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; BMI2-SLOW: # %bb.0: # %entry
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; BMI2-SLOW-NEXT: movl $35, %eax
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; BMI2-SLOW-NEXT: bzhiq %rax, %rdi, %rax
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; BMI2-SLOW-NEXT: shrq $2, %rax
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; BMI2-SLOW-NEXT: retq
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;
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; BEXTR-FAST-LABEL: bextr64d:
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; BEXTR-FAST: # %bb.0: # %entry
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; BEXTR-FAST-NEXT: movl $8450, %eax # imm = 0x2102
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; BEXTR-FAST-NEXT: bextrq %rax, %rdi, %rax
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; BEXTR-FAST-NEXT: retq
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entry:
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%shr = lshr i64 %a, 2
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%and = and i64 %shr, 8589934591
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ret i64 %and
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}
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define i64 @bextr64d_load(i64* %aptr) {
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; BMI1-SLOW-LABEL: bextr64d_load:
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; BMI1-SLOW: # %bb.0: # %entry
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; BMI1-SLOW-NEXT: movq (%rdi), %rax
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; BMI1-SLOW-NEXT: shrq $2, %rax
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; BMI1-SLOW-NEXT: movl $8448, %ecx # imm = 0x2100
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; BMI1-SLOW-NEXT: bextrq %rcx, %rax, %rax
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; BMI1-SLOW-NEXT: retq
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;
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; BMI2-SLOW-LABEL: bextr64d_load:
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; BMI2-SLOW: # %bb.0: # %entry
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; BMI2-SLOW-NEXT: movl $35, %eax
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; BMI2-SLOW-NEXT: bzhiq %rax, (%rdi), %rax
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; BMI2-SLOW-NEXT: shrq $2, %rax
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; BMI2-SLOW-NEXT: retq
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;
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; BEXTR-FAST-LABEL: bextr64d_load:
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; BEXTR-FAST: # %bb.0: # %entry
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; BEXTR-FAST-NEXT: movl $8450, %eax # imm = 0x2102
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; BEXTR-FAST-NEXT: bextrq %rax, (%rdi), %rax
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; BEXTR-FAST-NEXT: retq
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entry:
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%a = load i64, i64* %aptr, align 8
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%shr = lshr i64 %a, 2
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%and = and i64 %shr, 8589934591
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ret i64 %and
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}
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define i64 @non_bextr64(i64 %x) {
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; CHECK-LABEL: non_bextr64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: shrq $2, %rdi
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; CHECK-NEXT: movabsq $8589934590, %rax # imm = 0x1FFFFFFFE
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; CHECK-NEXT: andq %rdi, %rax
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; CHECK-NEXT: retq
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entry:
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%shr = lshr i64 %x, 2
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%and = and i64 %shr, 8589934590
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ret i64 %and
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}
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