0aef747b84
The motivation is that the update script has at least two deviations (`<...>@GOT`/`<...>@PLT`/ and not hiding pointer arithmetics) from what pretty much all the checklines were generated with, and most of the tests are still not updated, so each time one of the non-up-to-date tests is updated to see the effect of the code change, there is a lot of noise. Instead of having to deal with that each time, let's just deal with everything at once. This has been done via: ``` cd llvm-project/llvm/test/CodeGen/X86 grep -rl "; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py" | xargs -L1 <...>/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary <...>/llvm-project/build/bin/llc ``` Not all tests were regenerated, however.
261 lines
6.5 KiB
LLVM
261 lines
6.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
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; CodeGenPrepare is expected to form overflow intrinsics to improve DAG/isel.
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define i1 @usubo_ult_i64(i64 %x, i64 %y, i64* %p) nounwind {
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; CHECK-LABEL: usubo_ult_i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subq %rsi, %rdi
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: movq %rdi, (%rdx)
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; CHECK-NEXT: retq
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%s = sub i64 %x, %y
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store i64 %s, i64* %p
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%ov = icmp ult i64 %x, %y
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ret i1 %ov
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}
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; Verify insertion point for single-BB. Toggle predicate.
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define i1 @usubo_ugt_i32(i32 %x, i32 %y, i32* %p) nounwind {
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; CHECK-LABEL: usubo_ugt_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subl %esi, %edi
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: movl %edi, (%rdx)
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; CHECK-NEXT: retq
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%ov = icmp ugt i32 %y, %x
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%s = sub i32 %x, %y
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store i32 %s, i32* %p
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ret i1 %ov
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}
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; Constant operand should match.
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define i1 @usubo_ugt_constant_op0_i8(i8 %x, i8* %p) nounwind {
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; CHECK-LABEL: usubo_ugt_constant_op0_i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movb $42, %cl
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; CHECK-NEXT: subb %dil, %cl
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: movb %cl, (%rsi)
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; CHECK-NEXT: retq
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%s = sub i8 42, %x
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%ov = icmp ugt i8 %x, 42
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store i8 %s, i8* %p
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ret i1 %ov
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}
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; Compare with constant operand 0 is canonicalized by commuting, but verify match for non-canonical form.
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define i1 @usubo_ult_constant_op0_i16(i16 %x, i16* %p) nounwind {
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; CHECK-LABEL: usubo_ult_constant_op0_i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movw $43, %cx
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; CHECK-NEXT: subw %di, %cx
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: movw %cx, (%rsi)
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; CHECK-NEXT: retq
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%s = sub i16 43, %x
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%ov = icmp ult i16 43, %x
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store i16 %s, i16* %p
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ret i1 %ov
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}
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; Subtract with constant operand 1 is canonicalized to add.
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define i1 @usubo_ult_constant_op1_i16(i16 %x, i16* %p) nounwind {
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; CHECK-LABEL: usubo_ult_constant_op1_i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subw $44, %di
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: movw %di, (%rsi)
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; CHECK-NEXT: retq
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%s = add i16 %x, -44
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%ov = icmp ult i16 %x, 44
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store i16 %s, i16* %p
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ret i1 %ov
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}
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define i1 @usubo_ugt_constant_op1_i8(i8 %x, i8* %p) nounwind {
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; CHECK-LABEL: usubo_ugt_constant_op1_i8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subb $45, %dil
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: movb %dil, (%rsi)
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; CHECK-NEXT: retq
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%ov = icmp ugt i8 45, %x
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%s = add i8 %x, -45
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store i8 %s, i8* %p
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ret i1 %ov
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}
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; Special-case: subtract 1 changes the compare predicate and constant.
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define i1 @usubo_eq_constant1_op1_i32(i32 %x, i32* %p) nounwind {
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; CHECK-LABEL: usubo_eq_constant1_op1_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subl $1, %edi
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: movl %edi, (%rsi)
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; CHECK-NEXT: retq
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%s = add i32 %x, -1
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%ov = icmp eq i32 %x, 0
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store i32 %s, i32* %p
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ret i1 %ov
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}
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; Special-case: subtract from 0 (negate) changes the compare predicate.
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define i1 @usubo_ne_constant0_op1_i32(i32 %x, i32* %p) {
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; CHECK-LABEL: usubo_ne_constant0_op1_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: negl %edi
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: movl %edi, (%rsi)
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; CHECK-NEXT: retq
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%s = sub i32 0, %x
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%ov = icmp ne i32 %x, 0
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store i32 %s, i32* %p
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ret i1 %ov
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}
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; This used to verify insertion point for multi-BB, but now we just bail out.
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declare void @call(i1)
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define i1 @usubo_ult_sub_dominates_i64(i64 %x, i64 %y, i64* %p, i1 %cond) nounwind {
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; CHECK-LABEL: usubo_ult_sub_dominates_i64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: testb $1, %cl
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; CHECK-NEXT: je .LBB8_2
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; CHECK-NEXT: # %bb.1: # %t
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: subq %rsi, %rax
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; CHECK-NEXT: movq %rax, (%rdx)
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; CHECK-NEXT: testb $1, %cl
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; CHECK-NEXT: je .LBB8_2
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; CHECK-NEXT: # %bb.3: # %end
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; CHECK-NEXT: cmpq %rsi, %rdi
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB8_2: # %f
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; CHECK-NEXT: movl %ecx, %eax
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; CHECK-NEXT: retq
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entry:
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br i1 %cond, label %t, label %f
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t:
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%s = sub i64 %x, %y
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store i64 %s, i64* %p
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br i1 %cond, label %end, label %f
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f:
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ret i1 %cond
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end:
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%ov = icmp ult i64 %x, %y
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ret i1 %ov
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}
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define i1 @usubo_ult_cmp_dominates_i64(i64 %x, i64 %y, i64* %p, i1 %cond) nounwind {
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; CHECK-LABEL: usubo_ult_cmp_dominates_i64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbp
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; CHECK-NEXT: pushq %r15
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; CHECK-NEXT: pushq %r14
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: movl %ecx, %ebp
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; CHECK-NEXT: testb $1, %bpl
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; CHECK-NEXT: je .LBB9_2
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; CHECK-NEXT: # %bb.1: # %t
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; CHECK-NEXT: movq %rdx, %r14
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; CHECK-NEXT: movq %rsi, %r15
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; CHECK-NEXT: movq %rdi, %rbx
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; CHECK-NEXT: xorl %edi, %edi
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; CHECK-NEXT: cmpq %rsi, %rbx
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; CHECK-NEXT: setb %dil
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; CHECK-NEXT: callq call@PLT
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; CHECK-NEXT: subq %r15, %rbx
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; CHECK-NEXT: jae .LBB9_2
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; CHECK-NEXT: # %bb.4: # %end
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: movq %rbx, (%r14)
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; CHECK-NEXT: jmp .LBB9_3
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; CHECK-NEXT: .LBB9_2: # %f
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; CHECK-NEXT: movl %ebp, %eax
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; CHECK-NEXT: .LBB9_3: # %f
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; CHECK-NEXT: addq $8, %rsp
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: popq %r14
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; CHECK-NEXT: popq %r15
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; CHECK-NEXT: popq %rbp
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; CHECK-NEXT: retq
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entry:
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br i1 %cond, label %t, label %f
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t:
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%ov = icmp ult i64 %x, %y
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call void @call(i1 %ov)
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br i1 %ov, label %end, label %f
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f:
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ret i1 %cond
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end:
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%s = sub i64 %x, %y
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store i64 %s, i64* %p
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ret i1 %ov
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}
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define void @PR41129(i64* %p64) {
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; CHECK-LABEL: PR41129:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: testq %rax, %rax
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; CHECK-NEXT: je .LBB10_2
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; CHECK-NEXT: # %bb.1: # %false
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; CHECK-NEXT: andl $7, %eax
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; CHECK-NEXT: movq %rax, (%rdi)
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB10_2: # %true
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; CHECK-NEXT: decq %rax
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; CHECK-NEXT: movq %rax, (%rdi)
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; CHECK-NEXT: retq
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entry:
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%key = load i64, i64* %p64, align 8
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%cond17 = icmp eq i64 %key, 0
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br i1 %cond17, label %true, label %false
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false:
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%andval = and i64 %key, 7
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store i64 %andval, i64* %p64
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br label %exit
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true:
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%svalue = add i64 %key, -1
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store i64 %svalue, i64* %p64
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br label %exit
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exit:
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ret void
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}
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define i32 @PR42571(i32 %x, i32 %y) {
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; CHECK-LABEL: PR42571:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: leal -1(%rdi), %eax
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; CHECK-NEXT: andl %edi, %eax
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; CHECK-NEXT: cmpl $1, %edi
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; CHECK-NEXT: cmovbl %esi, %eax
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; CHECK-NEXT: retq
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%tobool = icmp eq i32 %x, 0
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%sub = add nsw i32 %x, -1
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%and = and i32 %sub, %x
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%cond = select i1 %tobool, i32 %y, i32 %and
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ret i32 %cond
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}
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