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clang-p2996/llvm/test/CodeGen/X86/fixup-bw-copy.mir
Simon Pilgrim d391e4fe84 [X86] Update RET/LRET instruction to use the same naming convention as IRET (PR36876). NFC
Be more consistent in the naming convention for the various RET instructions to specify in terms of bitwidth.

Helps prevent future scheduler model mismatches like those that were only addressed in D44687.

Differential Revision: https://reviews.llvm.org/D113302
2021-11-07 15:06:54 +00:00

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# RUN: llc -run-pass x86-fixup-bw-insts -mtriple=x86_64-- -o - %s | FileCheck %s
# Verify that we correctly deal with the flag edge cases when replacing
# copies by bigger copies, which is a pretty unusual transform.
--- |
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
define i8 @test_movb_killed(i8 %a0) {
ret i8 %a0
}
define i8 @test_movb_impuse(i8 %a0) {
ret i8 %a0
}
define i8 @test_movb_impdef_gr64(i8 %a0) {
ret i8 %a0
}
define i8 @test_movb_impdef_gr32(i8 %a0) {
ret i8 %a0
}
define i8 @test_movb_impdef_gr16(i8 %a0) {
ret i8 %a0
}
define i16 @test_movw_impdef_gr32(i16 %a0) {
ret i16 %a0
}
define i16 @test_movw_impdef_gr64(i16 %a0) {
ret i16 %a0
}
...
---
name: test_movb_killed
tracksRegLiveness: true
liveins:
- { reg: '$edi' }
body: |
bb.0 (%ir-block.0):
liveins: $edi
; CHECK: $eax = MOV32rr undef $edi, implicit $dil
$al = MOV8rr killed $dil
RET64 killed $al
...
---
name: test_movb_impuse
tracksRegLiveness: true
liveins:
- { reg: '$edi' }
body: |
bb.0 (%ir-block.0):
liveins: $edi
; CHECK: $eax = MOV32rr undef $edi, implicit $dil
$al = MOV8rr $dil, implicit $edi
RET64 killed $al
...
---
name: test_movb_impdef_gr64
tracksRegLiveness: true
liveins:
- { reg: '$edi' }
body: |
bb.0 (%ir-block.0):
liveins: $edi
; CHECK: $eax = MOV32rr undef $edi, implicit $dil, implicit-def $rax
$al = MOV8rr $dil, implicit-def $rax
RET64 killed $al
...
---
name: test_movb_impdef_gr32
tracksRegLiveness: true
liveins:
- { reg: '$edi' }
body: |
bb.0 (%ir-block.0):
liveins: $edi
; CHECK: $eax = MOV32rr undef $edi, implicit $dil
$al = MOV8rr $dil, implicit-def $eax
RET64 killed $al
...
---
name: test_movb_impdef_gr16
tracksRegLiveness: true
liveins:
- { reg: '$edi' }
body: |
bb.0 (%ir-block.0):
liveins: $edi
; CHECK: $eax = MOV32rr undef $edi, implicit $dil
$al = MOV8rr $dil, implicit-def $ax
RET64 killed $al
...
---
name: test_movw_impdef_gr32
tracksRegLiveness: true
liveins:
- { reg: '$edi' }
body: |
bb.0 (%ir-block.0):
liveins: $edi
; CHECK: $eax = MOV32rr undef $edi, implicit $di
$ax = MOV16rr $di, implicit-def $eax
RET64 killed $ax
...
---
name: test_movw_impdef_gr64
tracksRegLiveness: true
liveins:
- { reg: '$edi' }
body: |
bb.0 (%ir-block.0):
liveins: $edi
; CHECK: $eax = MOV32rr undef $edi, implicit $di, implicit-def $rax
$ax = MOV16rr $di, implicit-def $rax
RET64 killed $ax
...